Search

William A. Powell

Examiner (ID: 3432)

Most Active Art Unit
1765
Art Unit(s)
1104, 1106, 1301, 1303, 1304, 1765, 1307, 1109, 1763, 3202, 1502
Total Applications
3597
Issued Applications
3357
Pending Applications
97
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19575525 [patent_doc_number] => 20240379817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => STRESS-INDUCING SILICON LINER IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/779190 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779190
STRESS-INDUCING SILICON LINER IN SEMICONDUCTOR DEVICES Jul 21, 2024 Pending
Array ( [id] => 20091252 [patent_doc_number] => 20250221188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/679058 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679058 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679058
DISPLAY APPARATUS May 29, 2024 Pending
Array ( [id] => 19648521 [patent_doc_number] => 20240423041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/632178 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632178 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/632178
DISPLAY DEVICE Apr 9, 2024 Pending
Array ( [id] => 19531879 [patent_doc_number] => 20240355781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => INTEGRATED DEVICE COMPRISING AN OFFSET INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/628469 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628469 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/628469
INTEGRATED DEVICE COMPRISING AN OFFSET INTERCONNECT Apr 4, 2024 Pending
Array ( [id] => 19486665 [patent_doc_number] => 20240334707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => HIGH VOLTAGE DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/621724 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621724 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621724
HIGH VOLTAGE DEVICE AND METHOD Mar 28, 2024 Pending
Array ( [id] => 20649752 [patent_doc_number] => 12604715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Isolation structure and memory device [patent_app_type] => utility [patent_app_number] => 18/616199 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 1106 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616199 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/616199
Isolation structure and memory device Mar 25, 2024 Issued
Array ( [id] => 19364355 [patent_doc_number] => 20240266389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/611716 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611716 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/611716
SEMICONDUCTOR DEVICE Mar 20, 2024 Pending
Array ( [id] => 19806075 [patent_doc_number] => 20250072000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/435064 [patent_app_country] => US [patent_app_date] => 2024-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18435064 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/435064
SEMICONDUCTOR MEMORY DEVICE Feb 6, 2024 Pending
Array ( [id] => 19760086 [patent_doc_number] => 20250048651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/428376 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428376
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Jan 30, 2024 Pending
Array ( [id] => 20139387 [patent_doc_number] => 20250246431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => INTEGRATED CIRCUIT (IC) WITH CORRUGATED CHANNEL STRUCTURES HAVING CONTROLLED DOPING PROFILE OVER CHANNEL TOPOGRAPHY BASED ON DOPANT BALANCING OXIDATION [patent_app_type] => utility [patent_app_number] => 18/428212 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428212 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428212
INTEGRATED CIRCUIT (IC) WITH CORRUGATED CHANNEL STRUCTURES HAVING CONTROLLED DOPING PROFILE OVER CHANNEL TOPOGRAPHY BASED ON DOPANT BALANCING OXIDATION Jan 30, 2024 Pending
Array ( [id] => 19486658 [patent_doc_number] => 20240334700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => MICROELECTRONIC DEVICES INCLUDING VERTICAL PLANAR MEMORY CELL STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/424709 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424709 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/424709
MICROELECTRONIC DEVICES INCLUDING VERTICAL PLANAR MEMORY CELL STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS Jan 25, 2024 Pending
Array ( [id] => 19646616 [patent_doc_number] => 20240421136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/410400 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18410400 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/410400
SEMICONDUCTOR PACKAGE Jan 10, 2024 Pending
Array ( [id] => 19146400 [patent_doc_number] => 20240145430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 18/410060 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18410060 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/410060
INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME Jan 10, 2024 Pending
Array ( [id] => 20096398 [patent_doc_number] => 20250226334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => Semiconductor Device and Method of Making a Molded IPD-CoW [patent_app_type] => utility [patent_app_number] => 18/406924 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406924 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406924
Semiconductor Device and Method of Making a Molded IPD-CoW Jan 7, 2024 Pending
Array ( [id] => 19146616 [patent_doc_number] => 20240145646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/404050 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404050 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404050
LIGHT EMITTING DEVICE Jan 3, 2024 Pending
Array ( [id] => 19561924 [patent_doc_number] => 20240373716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/404298 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404298
DISPLAY PANEL AND DISPLAY DEVICE Jan 3, 2024 Pending
Array ( [id] => 20072248 [patent_doc_number] => 20250210470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => POLYMERIC DIE PAD FOR DIE ISOLATION IN CHIP ON LEAD PACKAGE [patent_app_type] => utility [patent_app_number] => 18/395593 [patent_app_country] => US [patent_app_date] => 2023-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395593 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395593
POLYMERIC DIE PAD FOR DIE ISOLATION IN CHIP ON LEAD PACKAGE Dec 23, 2023 Pending
Array ( [id] => 19101039 [patent_doc_number] => 20240120267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => METHOD OF PRODUCING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/390544 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18390544 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/390544
METHOD OF PRODUCING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE Dec 19, 2023 Pending
Array ( [id] => 19163131 [patent_doc_number] => 20240155838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/543944 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543944 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/543944
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Dec 17, 2023 Pending
Array ( [id] => 19749437 [patent_doc_number] => 20250038002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => In-Situ Tungsten for Gate Stack of Multigate Device [patent_app_type] => utility [patent_app_number] => 18/524282 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524282 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524282
In-Situ Tungsten for Gate Stack of Multigate Device Nov 29, 2023 Pending
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