Search

William A. Powell

Examiner (ID: 12339)

Most Active Art Unit
1765
Art Unit(s)
1307, 1109, 1301, 1304, 1303, 1765, 1106, 1104, 1763, 1502, 3202
Total Applications
3597
Issued Applications
3357
Pending Applications
97
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1594656 [patent_doc_number] => 06383934 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method and apparatus for chemical-mechanical planarization of microelectronic substrates with selected planarizing liquids' [patent_app_type] => B1 [patent_app_number] => 09/652955 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6051 [patent_no_of_claims] => 98 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383934.pdf [firstpage_image] =>[orig_patent_app_number] => 09652955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652955
Method and apparatus for chemical-mechanical planarization of microelectronic substrates with selected planarizing liquids Aug 30, 2000 Issued
Array ( [id] => 1542806 [patent_doc_number] => 06372657 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method for selective etching of oxides' [patent_app_type] => B1 [patent_app_number] => 09/653554 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4542 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/372/06372657.pdf [firstpage_image] =>[orig_patent_app_number] => 09653554 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653554
Method for selective etching of oxides Aug 30, 2000 Issued
Array ( [id] => 1386663 [patent_doc_number] => 06548407 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates' [patent_app_type] => B1 [patent_app_number] => 09/655139 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6503 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/548/06548407.pdf [firstpage_image] =>[orig_patent_app_number] => 09655139 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/655139
Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates Aug 30, 2000 Issued
Array ( [id] => 1478225 [patent_doc_number] => 06451705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Self-aligned PECVD etch mask' [patent_app_type] => B1 [patent_app_number] => 09/653522 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7150 [patent_no_of_claims] => 101 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/451/06451705.pdf [firstpage_image] =>[orig_patent_app_number] => 09653522 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653522
Self-aligned PECVD etch mask Aug 30, 2000 Issued
Array ( [id] => 1566109 [patent_doc_number] => 06376380 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Method of forming memory circuitry and method of forming memory circuitry comprising a buried bit line array of memory cells' [patent_app_type] => B1 [patent_app_number] => 09/652601 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 2317 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/376/06376380.pdf [firstpage_image] =>[orig_patent_app_number] => 09652601 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652601
Method of forming memory circuitry and method of forming memory circuitry comprising a buried bit line array of memory cells Aug 29, 2000 Issued
Array ( [id] => 4337026 [patent_doc_number] => 06333273 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Method and apparatus for dry etching' [patent_app_type] => 1 [patent_app_number] => 9/648772 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 11317 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333273.pdf [firstpage_image] =>[orig_patent_app_number] => 648772 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/648772
Method and apparatus for dry etching Aug 27, 2000 Issued
Array ( [id] => 1419471 [patent_doc_number] => 06506680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Method of forming connections with low dielectric insulating layers' [patent_app_type] => B1 [patent_app_number] => 09/649020 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3755 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/506/06506680.pdf [firstpage_image] =>[orig_patent_app_number] => 09649020 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649020
Method of forming connections with low dielectric insulating layers Aug 27, 2000 Issued
Array ( [id] => 1532663 [patent_doc_number] => 06410442 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Mask-less differential etching and planarization of copper films' [patent_app_type] => B1 [patent_app_number] => 09/640187 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 7705 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/410/06410442.pdf [firstpage_image] =>[orig_patent_app_number] => 09640187 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/640187
Mask-less differential etching and planarization of copper films Aug 16, 2000 Issued
Array ( [id] => 1520752 [patent_doc_number] => 06413872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method op optimizing vias between conductive layers in an integrated circuit structure' [patent_app_type] => B1 [patent_app_number] => 09/641096 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3817 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413872.pdf [firstpage_image] =>[orig_patent_app_number] => 09641096 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641096
Method op optimizing vias between conductive layers in an integrated circuit structure Aug 16, 2000 Issued
Array ( [id] => 1495129 [patent_doc_number] => 06403494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Method of forming a floating gate self-aligned to STI on EEPROM' [patent_app_type] => B1 [patent_app_number] => 09/638300 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 4426 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403494.pdf [firstpage_image] =>[orig_patent_app_number] => 09638300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/638300
Method of forming a floating gate self-aligned to STI on EEPROM Aug 13, 2000 Issued
Array ( [id] => 4278301 [patent_doc_number] => 06210525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Apparatus and methods for chemical-mechanical polishing of semiconductor wafers' [patent_app_type] => 1 [patent_app_number] => 9/634788 [patent_app_country] => US [patent_app_date] => 2000-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4494 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/210/06210525.pdf [firstpage_image] =>[orig_patent_app_number] => 634788 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634788
Apparatus and methods for chemical-mechanical polishing of semiconductor wafers Aug 8, 2000 Issued
Array ( [id] => 4325473 [patent_doc_number] => 06329296 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Metal catalyst technique for texturing silicon solar cells' [patent_app_type] => 1 [patent_app_number] => 9/634905 [patent_app_country] => US [patent_app_date] => 2000-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 3744 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329296.pdf [firstpage_image] =>[orig_patent_app_number] => 634905 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634905
Metal catalyst technique for texturing silicon solar cells Aug 8, 2000 Issued
Array ( [id] => 4394193 [patent_doc_number] => 06297064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'End point detecting method for semiconductor plasma processing' [patent_app_type] => 1 [patent_app_number] => 9/600175 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7160 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297064.pdf [firstpage_image] =>[orig_patent_app_number] => 600175 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/600175
End point detecting method for semiconductor plasma processing Aug 2, 2000 Issued
Array ( [id] => 7636675 [patent_doc_number] => 06379980 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Method and apparatus for monitoring material removal tool performance using endpoint time removal rate determination' [patent_app_type] => B1 [patent_app_number] => 09/625587 [patent_app_country] => US [patent_app_date] => 2000-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2432 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/379/06379980.pdf [firstpage_image] =>[orig_patent_app_number] => 09625587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/625587
Method and apparatus for monitoring material removal tool performance using endpoint time removal rate determination Jul 25, 2000 Issued
Array ( [id] => 1459610 [patent_doc_number] => 06391790 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method and apparatus for etching photomasks' [patent_app_type] => B1 [patent_app_number] => 09/625343 [patent_app_country] => US [patent_app_date] => 2000-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 7284 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/391/06391790.pdf [firstpage_image] =>[orig_patent_app_number] => 09625343 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/625343
Method and apparatus for etching photomasks Jul 24, 2000 Issued
Array ( [id] => 4382025 [patent_doc_number] => 06277761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Method for fabricating stacked vias' [patent_app_type] => 1 [patent_app_number] => 9/621433 [patent_app_country] => US [patent_app_date] => 2000-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2585 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277761.pdf [firstpage_image] =>[orig_patent_app_number] => 621433 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/621433
Method for fabricating stacked vias Jul 20, 2000 Issued
Array ( [id] => 1416891 [patent_doc_number] => 06509271 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/621566 [patent_app_country] => US [patent_app_date] => 2000-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3579 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509271.pdf [firstpage_image] =>[orig_patent_app_number] => 09621566 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/621566
Manufacturing method of semiconductor device Jul 20, 2000 Issued
Array ( [id] => 1514416 [patent_doc_number] => 06420194 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Method for extracting process determinant conditions from a plurality of process signals' [patent_app_type] => B1 [patent_app_number] => 09/616120 [patent_app_country] => US [patent_app_date] => 2000-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 7303 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420194.pdf [firstpage_image] =>[orig_patent_app_number] => 09616120 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/616120
Method for extracting process determinant conditions from a plurality of process signals Jul 13, 2000 Issued
Array ( [id] => 1255335 [patent_doc_number] => 06666986 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Supercritical etching compositions and method of using same' [patent_app_type] => B1 [patent_app_number] => 09/616170 [patent_app_country] => US [patent_app_date] => 2000-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5489 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/666/06666986.pdf [firstpage_image] =>[orig_patent_app_number] => 09616170 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/616170
Supercritical etching compositions and method of using same Jul 13, 2000 Issued
Array ( [id] => 1545456 [patent_doc_number] => 06444589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Method and apparatus for etching silicon' [patent_app_type] => B1 [patent_app_number] => 09/615775 [patent_app_country] => US [patent_app_date] => 2000-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5388 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444589.pdf [firstpage_image] =>[orig_patent_app_number] => 09615775 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/615775
Method and apparatus for etching silicon Jul 12, 2000 Issued
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