
William A Powell
Examiner (ID: 17926)
| Most Active Art Unit | 1765 |
| Art Unit(s) | 1104, 1763, 1106, 1765, 1109, 1301, 1307, 3202, 1502, 1304, 1303 |
| Total Applications | 3597 |
| Issued Applications | 3357 |
| Pending Applications | 97 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4367031
[patent_doc_number] => 06274505
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-14
[patent_title] => 'Etching method, etching apparatus and analyzing method'
[patent_app_type] => 1
[patent_app_number] => 9/387801
[patent_app_country] => US
[patent_app_date] => 1999-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 30
[patent_no_of_words] => 8104
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/274/06274505.pdf
[firstpage_image] =>[orig_patent_app_number] => 387801
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/387801 | Etching method, etching apparatus and analyzing method | Aug 31, 1999 | Issued |
Array
(
[id] => 4270705
[patent_doc_number] => 06245685
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Method for forming a square oxide structure or a square floating gate structure without rounding effect'
[patent_app_type] => 1
[patent_app_number] => 9/387441
[patent_app_country] => US
[patent_app_date] => 1999-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3093
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/245/06245685.pdf
[firstpage_image] =>[orig_patent_app_number] => 387441
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/387441 | Method for forming a square oxide structure or a square floating gate structure without rounding effect | Aug 31, 1999 | Issued |
Array
(
[id] => 4419869
[patent_doc_number] => 06177355
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-23
[patent_title] => 'Pad etch process capable of thick titanium nitride arc removal'
[patent_app_type] => 1
[patent_app_number] => 9/387122
[patent_app_country] => US
[patent_app_date] => 1999-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1711
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/177/06177355.pdf
[firstpage_image] =>[orig_patent_app_number] => 387122
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/387122 | Pad etch process capable of thick titanium nitride arc removal | Aug 30, 1999 | Issued |
Array
(
[id] => 1320867
[patent_doc_number] => 06602383
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-05
[patent_title] => 'Apparatus and methods for controlling workpiece surface exposure to processing liquids during the fabrication of microelectronic components'
[patent_app_type] => B1
[patent_app_number] => 09/386200
[patent_app_country] => US
[patent_app_date] => 1999-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5669
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/602/06602383.pdf
[firstpage_image] =>[orig_patent_app_number] => 09386200
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/386200 | Apparatus and methods for controlling workpiece surface exposure to processing liquids during the fabrication of microelectronic components | Aug 30, 1999 | Issued |
Array
(
[id] => 1445752
[patent_doc_number] => 06368518
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-09
[patent_title] => 'Methods for removing rhodium- and iridium-containing films'
[patent_app_type] => B1
[patent_app_number] => 09/382506
[patent_app_country] => US
[patent_app_date] => 1999-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3838
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/368/06368518.pdf
[firstpage_image] =>[orig_patent_app_number] => 09382506
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/382506 | Methods for removing rhodium- and iridium-containing films | Aug 24, 1999 | Issued |
Array
(
[id] => 4358992
[patent_doc_number] => 06255222
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Method for removing residue from substrate processing chamber exhaust line for silicon-oxygen-carbon deposition process'
[patent_app_type] => 1
[patent_app_number] => 9/379834
[patent_app_country] => US
[patent_app_date] => 1999-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7400
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/255/06255222.pdf
[firstpage_image] =>[orig_patent_app_number] => 379834
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/379834 | Method for removing residue from substrate processing chamber exhaust line for silicon-oxygen-carbon deposition process | Aug 23, 1999 | Issued |
Array
(
[id] => 4247840
[patent_doc_number] => 06221783
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'Method of manufacturing a heterojunction bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 9/378764
[patent_app_country] => US
[patent_app_date] => 1999-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 3431
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/221/06221783.pdf
[firstpage_image] =>[orig_patent_app_number] => 378764
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/378764 | Method of manufacturing a heterojunction bipolar transistor | Aug 22, 1999 | Issued |
Array
(
[id] => 4250712
[patent_doc_number] => 06207570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-27
[patent_title] => 'Method of manufacturing integrated circuit devices'
[patent_app_type] => 1
[patent_app_number] => 9/378250
[patent_app_country] => US
[patent_app_date] => 1999-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 3596
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/207/06207570.pdf
[firstpage_image] =>[orig_patent_app_number] => 378250
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/378250 | Method of manufacturing integrated circuit devices | Aug 19, 1999 | Issued |
Array
(
[id] => 4381929
[patent_doc_number] => 06261957
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-17
[patent_title] => 'Self-planarized gap-filling by HDPCVD for shallow trench isolation'
[patent_app_type] => 1
[patent_app_number] => 9/378496
[patent_app_country] => US
[patent_app_date] => 1999-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 6974
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/261/06261957.pdf
[firstpage_image] =>[orig_patent_app_number] => 378496
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/378496 | Self-planarized gap-filling by HDPCVD for shallow trench isolation | Aug 19, 1999 | Issued |
Array
(
[id] => 1461341
[patent_doc_number] => 06350388
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-02-26
[patent_title] => 'Method for patterning high density field emitter tips'
[patent_app_type] => B1
[patent_app_number] => 09/377256
[patent_app_country] => US
[patent_app_date] => 1999-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3497
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/350/06350388.pdf
[firstpage_image] =>[orig_patent_app_number] => 09377256
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/377256 | Method for patterning high density field emitter tips | Aug 18, 1999 | Issued |
Array
(
[id] => 4294415
[patent_doc_number] => 06197697
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-06
[patent_title] => 'Method of patterning semiconductor materials and other brittle materials'
[patent_app_type] => 1
[patent_app_number] => 9/377053
[patent_app_country] => US
[patent_app_date] => 1999-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 17
[patent_no_of_words] => 4506
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/197/06197697.pdf
[firstpage_image] =>[orig_patent_app_number] => 377053
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/377053 | Method of patterning semiconductor materials and other brittle materials | Aug 18, 1999 | Issued |
Array
(
[id] => 4290465
[patent_doc_number] => 06235643
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Method for etching a trench having rounded top and bottom corners in a silicon substrate'
[patent_app_type] => 1
[patent_app_number] => 9/371966
[patent_app_country] => US
[patent_app_date] => 1999-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 10004
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/235/06235643.pdf
[firstpage_image] =>[orig_patent_app_number] => 371966
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/371966 | Method for etching a trench having rounded top and bottom corners in a silicon substrate | Aug 9, 1999 | Issued |
| 90/005429 | TOPOGRAPHICAL STRUCTURE OF AN ELECTROSTATIC CHUCK AND METHOD OF FABRICATING SAME | Aug 8, 1999 | Issued |
Array
(
[id] => 1564092
[patent_doc_number] => 06338804
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-15
[patent_title] => 'Method for removing conductive portions'
[patent_app_type] => B1
[patent_app_number] => 09/370481
[patent_app_country] => US
[patent_app_date] => 1999-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2076
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/338/06338804.pdf
[firstpage_image] =>[orig_patent_app_number] => 09370481
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/370481 | Method for removing conductive portions | Aug 8, 1999 | Issued |
Array
(
[id] => 4355304
[patent_doc_number] => 06200908
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Process for reducing waviness in semiconductor wafers'
[patent_app_type] => 1
[patent_app_number] => 9/366815
[patent_app_country] => US
[patent_app_date] => 1999-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 4404
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/200/06200908.pdf
[firstpage_image] =>[orig_patent_app_number] => 366815
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/366815 | Process for reducing waviness in semiconductor wafers | Aug 3, 1999 | Issued |
Array
(
[id] => 4228629
[patent_doc_number] => 06165425
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Melting pot with silicon protective layers, method for applying said layer and the use thereof'
[patent_app_type] => 1
[patent_app_number] => 9/355813
[patent_app_country] => US
[patent_app_date] => 1999-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2882
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/165/06165425.pdf
[firstpage_image] =>[orig_patent_app_number] => 355813
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/355813 | Melting pot with silicon protective layers, method for applying said layer and the use thereof | Aug 3, 1999 | Issued |
Array
(
[id] => 4406053
[patent_doc_number] => 06232236
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-15
[patent_title] => 'Apparatus and method for controlling plasma uniformity in a semiconductor wafer processing system'
[patent_app_type] => 1
[patent_app_number] => 9/365999
[patent_app_country] => US
[patent_app_date] => 1999-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4604
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/232/06232236.pdf
[firstpage_image] =>[orig_patent_app_number] => 365999
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/365999 | Apparatus and method for controlling plasma uniformity in a semiconductor wafer processing system | Aug 2, 1999 | Issued |
| 90/005442 | PLASMA ETCHING USING HYDROGEN BROMIDE ADDICTION | Aug 2, 1999 | Issued |
Array
(
[id] => 4406509
[patent_doc_number] => 06171971
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Freestanding multilayer wiring structure'
[patent_app_type] => 1
[patent_app_number] => 9/362502
[patent_app_country] => US
[patent_app_date] => 1999-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 6131
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/171/06171971.pdf
[firstpage_image] =>[orig_patent_app_number] => 362502
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/362502 | Freestanding multilayer wiring structure | Jul 29, 1999 | Issued |
Array
(
[id] => 4171895
[patent_doc_number] => 06159077
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-12
[patent_title] => 'Colloidal silica polishing abrasive'
[patent_app_type] => 1
[patent_app_number] => 9/365098
[patent_app_country] => US
[patent_app_date] => 1999-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1314
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/159/06159077.pdf
[firstpage_image] =>[orig_patent_app_number] => 365098
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/365098 | Colloidal silica polishing abrasive | Jul 29, 1999 | Issued |