
William A Powell
Examiner (ID: 17926)
| Most Active Art Unit | 1765 |
| Art Unit(s) | 1104, 1763, 1106, 1765, 1109, 1301, 1307, 3202, 1502, 1304, 1303 |
| Total Applications | 3597 |
| Issued Applications | 3357 |
| Pending Applications | 97 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4191767
[patent_doc_number] => 06130163
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-10
[patent_title] => 'Stabilization of slurry used in chemical mechanical polishing of semiconductor wafers by adjustment of PH of deionized water'
[patent_app_type] => 1
[patent_app_number] => 9/326400
[patent_app_country] => US
[patent_app_date] => 1999-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/130/06130163.pdf
[firstpage_image] =>[orig_patent_app_number] => 326400
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/326400 | Stabilization of slurry used in chemical mechanical polishing of semiconductor wafers by adjustment of PH of deionized water | Jun 2, 1999 | Issued |
Array
(
[id] => 4147460
[patent_doc_number] => 06122174
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-19
[patent_title] => 'Method of accessing the circuitry on a semiconductor substrate from the bottom of the semiconductor substrate'
[patent_app_type] => 1
[patent_app_number] => 9/324634
[patent_app_country] => US
[patent_app_date] => 1999-06-02
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[pdf_file] => patents/06/122/06122174.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/324634 | Method of accessing the circuitry on a semiconductor substrate from the bottom of the semiconductor substrate | Jun 1, 1999 | Issued |
Array
(
[id] => 4233721
[patent_doc_number] => 06117792
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[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/320971
[patent_app_country] => US
[patent_app_date] => 1999-05-27
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 4189048
[patent_doc_number] => 06153526
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-28
[patent_title] => 'Method to remove residue in wolfram CMP'
[patent_app_type] => 1
[patent_app_number] => 9/320758
[patent_app_country] => US
[patent_app_date] => 1999-05-27
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 320758
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/320758 | Method to remove residue in wolfram CMP | May 26, 1999 | Issued |
Array
(
[id] => 4247805
[patent_doc_number] => 06221781
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'Combined process chamber with multi-positionable pedestal'
[patent_app_type] => 1
[patent_app_number] => 9/321139
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[patent_app_date] => 1999-05-27
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[pdf_file] => patents/06/221/06221781.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/321139 | Combined process chamber with multi-positionable pedestal | May 26, 1999 | Issued |
Array
(
[id] => 4246911
[patent_doc_number] => 06136723
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-24
[patent_title] => 'Dry etching process and a fabrication process of a semiconductor device using such a dry etching process'
[patent_app_type] => 1
[patent_app_number] => 9/318613
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[pdf_file] => patents/06/136/06136723.pdf
[firstpage_image] =>[orig_patent_app_number] => 318613
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/318613 | Dry etching process and a fabrication process of a semiconductor device using such a dry etching process | May 25, 1999 | Issued |
Array
(
[id] => 4169952
[patent_doc_number] => 06140245
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-31
[patent_title] => 'Semiconductor processing methods, and methods of forming capacitor constructions'
[patent_app_type] => 1
[patent_app_number] => 9/320381
[patent_app_country] => US
[patent_app_date] => 1999-05-26
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[pdf_file] => patents/06/140/06140245.pdf
[firstpage_image] =>[orig_patent_app_number] => 320381
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/320381 | Semiconductor processing methods, and methods of forming capacitor constructions | May 25, 1999 | Issued |
Array
(
[id] => 4131858
[patent_doc_number] => 06147002
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Process for removing contaminant from a surface and composition useful therefor'
[patent_app_type] => 1
[patent_app_number] => 9/318814
[patent_app_country] => US
[patent_app_date] => 1999-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
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[pdf_file] => patents/06/147/06147002.pdf
[firstpage_image] =>[orig_patent_app_number] => 318814
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/318814 | Process for removing contaminant from a surface and composition useful therefor | May 25, 1999 | Issued |
Array
(
[id] => 4294336
[patent_doc_number] => 06197692
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-06
[patent_title] => 'Semiconductor wafer planarizing device and method for planarizing a surface of semiconductor wafer by polishing it'
[patent_app_type] => 1
[patent_app_number] => 9/317948
[patent_app_country] => US
[patent_app_date] => 1999-05-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/317948 | Semiconductor wafer planarizing device and method for planarizing a surface of semiconductor wafer by polishing it | May 24, 1999 | Issued |
Array
(
[id] => 4259239
[patent_doc_number] => 06204185
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Method for forming self-align stop layer for borderless contact process'
[patent_app_type] => 1
[patent_app_number] => 9/316993
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[patent_app_date] => 1999-05-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/316993 | Method for forming self-align stop layer for borderless contact process | May 23, 1999 | Issued |
Array
(
[id] => 4191867
[patent_doc_number] => 06130169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-10
[patent_title] => 'Efficient in-situ resist strip process for heavy polymer metal etch'
[patent_app_type] => 1
[patent_app_number] => 9/316491
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[patent_app_date] => 1999-05-21
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[firstpage_image] =>[orig_patent_app_number] => 316491
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/316491 | Efficient in-situ resist strip process for heavy polymer metal etch | May 20, 1999 | Issued |
Array
(
[id] => 4132050
[patent_doc_number] => 06121151
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[patent_issue_date] => 2000-09-19
[patent_title] => 'Method of fabricating passivation layer in liquid crystal display'
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[patent_app_number] => 9/316585
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/316585 | Method of fabricating passivation layer in liquid crystal display | May 20, 1999 | Issued |
Array
(
[id] => 4367045
[patent_doc_number] => 06274506
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[patent_issue_date] => 2001-08-14
[patent_title] => 'Apparatus and method for dispensing processing fluid toward a substrate surface'
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[patent_app_number] => 9/312409
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/312409 | Apparatus and method for dispensing processing fluid toward a substrate surface | May 13, 1999 | Issued |
Array
(
[id] => 4132222
[patent_doc_number] => 06059895
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[patent_title] => 'Strained Si/SiGe layers on insulator'
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Array
(
[id] => 4057395
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Array
(
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Array
(
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Array
(
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/301481 | Method for forming a hard mask of half critical dimension | Apr 27, 1999 | Issued |