Search

William A. Powell

Examiner (ID: 12339)

Most Active Art Unit
1765
Art Unit(s)
1307, 1109, 1301, 1304, 1303, 1765, 1106, 1104, 1763, 1502, 3202
Total Applications
3597
Issued Applications
3357
Pending Applications
97
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
90/004629 TWO-STEP PLASMA PROCESS FOR SELECTIVE ANISOTROPIC ETCHING OF POLYCRYSTALLINE SILICON WITHOUT LEAVING RESIDUE Apr 29, 1997 Issued
Array ( [id] => 4012838 [patent_doc_number] => 05880034 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Reduction of semiconductor structure damage during reactive ion etching' [patent_app_type] => 1 [patent_app_number] => 8/841218 [patent_app_country] => US [patent_app_date] => 1997-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4798 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880034.pdf [firstpage_image] =>[orig_patent_app_number] => 841218 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/841218
Reduction of semiconductor structure damage during reactive ion etching Apr 28, 1997 Issued
Array ( [id] => 3926016 [patent_doc_number] => 05928526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method for manufacturing a substrate having an irregular shape' [patent_app_type] => 1 [patent_app_number] => 8/845810 [patent_app_country] => US [patent_app_date] => 1997-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4972 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/928/05928526.pdf [firstpage_image] =>[orig_patent_app_number] => 845810 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/845810
Method for manufacturing a substrate having an irregular shape Apr 28, 1997 Issued
Array ( [id] => 3779712 [patent_doc_number] => 05840201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Method for forming spacers in flat panel displays using photo-etching' [patent_app_type] => 1 [patent_app_number] => 8/846018 [patent_app_country] => US [patent_app_date] => 1997-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1747 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/840/05840201.pdf [firstpage_image] =>[orig_patent_app_number] => 846018 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/846018
Method for forming spacers in flat panel displays using photo-etching Apr 24, 1997 Issued
Array ( [id] => 4029999 [patent_doc_number] => 05994222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method of making chip mountings and assemblies' [patent_app_type] => 1 [patent_app_number] => 8/845786 [patent_app_country] => US [patent_app_date] => 1997-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5985 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994222.pdf [firstpage_image] =>[orig_patent_app_number] => 845786 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/845786
Method of making chip mountings and assemblies Apr 24, 1997 Issued
Array ( [id] => 4046944 [patent_doc_number] => 05869404 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Method for forming contact hole of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/847811 [patent_app_country] => US [patent_app_date] => 1997-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1513 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869404.pdf [firstpage_image] =>[orig_patent_app_number] => 847811 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/847811
Method for forming contact hole of semiconductor device Apr 24, 1997 Issued
Array ( [id] => 3923209 [patent_doc_number] => 05914279 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Silicon nitride sidewall and top surface layer separating conductors' [patent_app_type] => 1 [patent_app_number] => 8/845755 [patent_app_country] => US [patent_app_date] => 1997-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 59 [patent_no_of_words] => 7597 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914279.pdf [firstpage_image] =>[orig_patent_app_number] => 845755 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/845755
Silicon nitride sidewall and top surface layer separating conductors Apr 24, 1997 Issued
Array ( [id] => 3860652 [patent_doc_number] => 05837154 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Method of manufacturing double-sided circuit tape carrier' [patent_app_type] => 1 [patent_app_number] => 8/847753 [patent_app_country] => US [patent_app_date] => 1997-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4608 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/837/05837154.pdf [firstpage_image] =>[orig_patent_app_number] => 847753 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/847753
Method of manufacturing double-sided circuit tape carrier Apr 22, 1997 Issued
Array ( [id] => 4017232 [patent_doc_number] => 05925262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Plasma display panel and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/840525 [patent_app_country] => US [patent_app_date] => 1997-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1929 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925262.pdf [firstpage_image] =>[orig_patent_app_number] => 840525 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/840525
Plasma display panel and method of fabricating the same Apr 20, 1997 Issued
Array ( [id] => 3825868 [patent_doc_number] => 05783490 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Photolithography alignment mark and manufacturing method' [patent_app_type] => 1 [patent_app_number] => 8/845253 [patent_app_country] => US [patent_app_date] => 1997-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2094 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/783/05783490.pdf [firstpage_image] =>[orig_patent_app_number] => 845253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/845253
Photolithography alignment mark and manufacturing method Apr 20, 1997 Issued
Array ( [id] => 3751318 [patent_doc_number] => 05843269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Slurry dispensing system for chemical-mechanical polishing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/845077 [patent_app_country] => US [patent_app_date] => 1997-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 700 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/843/05843269.pdf [firstpage_image] =>[orig_patent_app_number] => 845077 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/845077
Slurry dispensing system for chemical-mechanical polishing apparatus Apr 17, 1997 Issued
Array ( [id] => 3991437 [patent_doc_number] => 05891806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Proximity-type microlithography apparatus and method' [patent_app_type] => 1 [patent_app_number] => 8/842897 [patent_app_country] => US [patent_app_date] => 1997-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 14596 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/891/05891806.pdf [firstpage_image] =>[orig_patent_app_number] => 842897 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/842897
Proximity-type microlithography apparatus and method Apr 16, 1997 Issued
Array ( [id] => 3958979 [patent_doc_number] => 05885470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Controlled fluid transport in microfabricated polymeric substrates' [patent_app_type] => 1 [patent_app_number] => 8/843212 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7864 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/885/05885470.pdf [firstpage_image] =>[orig_patent_app_number] => 843212 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/843212
Controlled fluid transport in microfabricated polymeric substrates Apr 13, 1997 Issued
Array ( [id] => 4051287 [patent_doc_number] => 05863447 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Method for providing a selective reference layer isolation technique for the production of printed circuit boards' [patent_app_type] => 1 [patent_app_number] => 8/833612 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4148 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/863/05863447.pdf [firstpage_image] =>[orig_patent_app_number] => 833612 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/833612
Method for providing a selective reference layer isolation technique for the production of printed circuit boards Apr 7, 1997 Issued
Array ( [id] => 3779684 [patent_doc_number] => 05840199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Method for purging a multi-layer sacrificial etched silicon substrate' [patent_app_type] => 1 [patent_app_number] => 8/841938 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 52 [patent_no_of_words] => 9858 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/840/05840199.pdf [firstpage_image] =>[orig_patent_app_number] => 841938 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/841938
Method for purging a multi-layer sacrificial etched silicon substrate Apr 7, 1997 Issued
Array ( [id] => 4063177 [patent_doc_number] => 05866483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Method for anisotropically etching tungsten using SF.sub.6, CHF.sub.3, and N.sub.2' [patent_app_type] => 1 [patent_app_number] => 8/833413 [patent_app_country] => US [patent_app_date] => 1997-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 6999 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/866/05866483.pdf [firstpage_image] =>[orig_patent_app_number] => 833413 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/833413
Method for anisotropically etching tungsten using SF.sub.6, CHF.sub.3, and N.sub.2 Apr 3, 1997 Issued
Array ( [id] => 3760564 [patent_doc_number] => 05772832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Process for etching oxides in an electromagnetically coupled planar plasma apparatus' [patent_app_type] => 1 [patent_app_number] => 8/835091 [patent_app_country] => US [patent_app_date] => 1997-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2206 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/772/05772832.pdf [firstpage_image] =>[orig_patent_app_number] => 835091 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835091
Process for etching oxides in an electromagnetically coupled planar plasma apparatus Apr 3, 1997 Issued
Array ( [id] => 3798449 [patent_doc_number] => 05853601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Top-via etch technique for forming dielectric membranes' [patent_app_type] => 1 [patent_app_number] => 8/832080 [patent_app_country] => US [patent_app_date] => 1997-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 3368 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/853/05853601.pdf [firstpage_image] =>[orig_patent_app_number] => 832080 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/832080
Top-via etch technique for forming dielectric membranes Apr 2, 1997 Issued
Array ( [id] => 3881733 [patent_doc_number] => 05833870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Method for forming a high density quantum wire' [patent_app_type] => 1 [patent_app_number] => 8/833047 [patent_app_country] => US [patent_app_date] => 1997-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1997 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/833/05833870.pdf [firstpage_image] =>[orig_patent_app_number] => 833047 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/833047
Method for forming a high density quantum wire Apr 2, 1997 Issued
Array ( [id] => 3999801 [patent_doc_number] => 05888410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Dry etching method and manufacturing method of manufacturing EL element using same' [patent_app_type] => 1 [patent_app_number] => 8/825579 [patent_app_country] => US [patent_app_date] => 1997-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 6811 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/888/05888410.pdf [firstpage_image] =>[orig_patent_app_number] => 825579 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825579
Dry etching method and manufacturing method of manufacturing EL element using same Mar 30, 1997 Issued
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