Search

William A. Powell

Examiner (ID: 14143)

Most Active Art Unit
1765
Art Unit(s)
1763, 1304, 1765, 1104, 1303, 3202, 1106, 1502, 1301, 1109, 1307
Total Applications
3597
Issued Applications
3357
Pending Applications
97
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5986511 [patent_doc_number] => 20020098704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Method for fabrication of a contact plug in an embedded memory' [patent_app_type] => new [patent_app_number] => 09/764328 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098704.pdf [firstpage_image] =>[orig_patent_app_number] => 09764328 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/764328
Method for fabrication of a contact plug in an embedded memory Jan 18, 2001 Issued
Array ( [id] => 1376490 [patent_doc_number] => 06559059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-06 [patent_title] => 'Method for fabricating a MOS transistor of an embedded memory' [patent_app_type] => B2 [patent_app_number] => 09/764327 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 3223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559059.pdf [firstpage_image] =>[orig_patent_app_number] => 09764327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/764327
Method for fabricating a MOS transistor of an embedded memory Jan 18, 2001 Issued
Array ( [id] => 1264587 [patent_doc_number] => 06660647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Method for processing surface of sample' [patent_app_type] => B1 [patent_app_number] => 09/646012 [patent_app_country] => US [patent_app_date] => 2001-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 8847 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/660/06660647.pdf [firstpage_image] =>[orig_patent_app_number] => 09646012 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/646012
Method for processing surface of sample Jan 10, 2001 Issued
Array ( [id] => 1507539 [patent_doc_number] => 06440870 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures' [patent_app_type] => B1 [patent_app_number] => 09/755522 [patent_app_country] => US [patent_app_date] => 2001-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 8426 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/440/06440870.pdf [firstpage_image] =>[orig_patent_app_number] => 09755522 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/755522
Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures Jan 4, 2001 Issued
Array ( [id] => 1520745 [patent_doc_number] => 06413868 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Modular high frequency integrated circuit structure' [patent_app_type] => B1 [patent_app_number] => 09/735309 [patent_app_country] => US [patent_app_date] => 2001-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 3799 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413868.pdf [firstpage_image] =>[orig_patent_app_number] => 09735309 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/735309
Modular high frequency integrated circuit structure Jan 3, 2001 Issued
Array ( [id] => 1467082 [patent_doc_number] => 06458709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-01 [patent_title] => 'Method for fabricating a repair fuse box for a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/751847 [patent_app_country] => US [patent_app_date] => 2001-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1761 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/458/06458709.pdf [firstpage_image] =>[orig_patent_app_number] => 09751847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751847
Method for fabricating a repair fuse box for a semiconductor device Jan 1, 2001 Issued
Array ( [id] => 6876697 [patent_doc_number] => 20010006850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-05 [patent_title] => 'Method for manufacturing contact hole in semiconductor device' [patent_app_type] => new-utility [patent_app_number] => 09/745445 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1408 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20010006850.pdf [firstpage_image] =>[orig_patent_app_number] => 09745445 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/745445
Method for manufacturing contact hole in semiconductor device Dec 25, 2000 Issued
Array ( [id] => 1469932 [patent_doc_number] => 06407005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-18 [patent_title] => 'Method for forming semiconductor device to prevent electric field concentration from being generated at corner of active region' [patent_app_type] => B2 [patent_app_number] => 09/745444 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1812 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407005.pdf [firstpage_image] =>[orig_patent_app_number] => 09745444 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/745444
Method for forming semiconductor device to prevent electric field concentration from being generated at corner of active region Dec 25, 2000 Issued
Array ( [id] => 6075375 [patent_doc_number] => 20020079288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Manufacture of printed circuits using single layer processing techniques' [patent_app_type] => new [patent_app_number] => 09/748782 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5144 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20020079288.pdf [firstpage_image] =>[orig_patent_app_number] => 09748782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/748782
Manufacture of printed circuits using single layer processing techniques Dec 25, 2000 Issued
Array ( [id] => 6900710 [patent_doc_number] => 20010022293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-20 [patent_title] => 'Plasma processing equipment and plasma processing method using the same' [patent_app_type] => new [patent_app_number] => 09/741996 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20010022293.pdf [firstpage_image] =>[orig_patent_app_number] => 09741996 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/741996
Plasma processing equipment and plasma processing method using the same Dec 21, 2000 Issued
Array ( [id] => 1495133 [patent_doc_number] => 06403495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-11 [patent_title] => 'Capacitor fabricating method of semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/742650 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3018 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403495.pdf [firstpage_image] =>[orig_patent_app_number] => 09742650 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/742650
Capacitor fabricating method of semiconductor device Dec 20, 2000 Issued
Array ( [id] => 1593683 [patent_doc_number] => 06491837 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Polishing slurry' [patent_app_type] => B1 [patent_app_number] => 09/740825 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 4890 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/491/06491837.pdf [firstpage_image] =>[orig_patent_app_number] => 09740825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740825
Polishing slurry Dec 20, 2000 Issued
Array ( [id] => 1419562 [patent_doc_number] => 06506687 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Dry etching device and method of producing semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 09/720080 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 10706 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/506/06506687.pdf [firstpage_image] =>[orig_patent_app_number] => 09720080 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/720080
Dry etching device and method of producing semiconductor devices Dec 19, 2000 Issued
Array ( [id] => 6877177 [patent_doc_number] => 20010002663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-07 [patent_title] => 'Gas phase silicon etching with bromine trifluoride' [patent_app_type] => new-utility [patent_app_number] => 09/741403 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4565 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002663.pdf [firstpage_image] =>[orig_patent_app_number] => 09741403 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/741403
Gas phase silicon etching with bromine trifluoride Dec 18, 2000 Issued
Array ( [id] => 1321228 [patent_doc_number] => 06602433 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Gas delivery system' [patent_app_type] => B1 [patent_app_number] => 09/674658 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1420 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602433.pdf [firstpage_image] =>[orig_patent_app_number] => 09674658 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/674658
Gas delivery system Dec 17, 2000 Issued
Array ( [id] => 1379115 [patent_doc_number] => 06547976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-15 [patent_title] => 'High precision alignment of optical waveguide features' [patent_app_type] => B2 [patent_app_number] => 09/735774 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 3155 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/547/06547976.pdf [firstpage_image] =>[orig_patent_app_number] => 09735774 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/735774
High precision alignment of optical waveguide features Dec 12, 2000 Issued
Array ( [id] => 1419483 [patent_doc_number] => 06506681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-14 [patent_title] => 'Thin flipchip method' [patent_app_type] => B2 [patent_app_number] => 09/731360 [patent_app_country] => US [patent_app_date] => 2000-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 9208 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/506/06506681.pdf [firstpage_image] =>[orig_patent_app_number] => 09731360 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731360
Thin flipchip method Dec 5, 2000 Issued
Array ( [id] => 6875415 [patent_doc_number] => 20010000159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-04-05 [patent_title] => 'Method of fabricating a semiconductor insulation layer' [patent_app_type] => new-utility [patent_app_number] => 09/730273 [patent_app_country] => US [patent_app_date] => 2000-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3559 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20010000159.pdf [firstpage_image] =>[orig_patent_app_number] => 09730273 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/730273
Method of fabricating a semiconductor insulation layer Dec 4, 2000 Issued
Array ( [id] => 6618682 [patent_doc_number] => 20020064956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => 'METHOD OF FORMING A STORAGE NODE OF A CAPACITOR' [patent_app_type] => new [patent_app_number] => 09/725091 [patent_app_country] => US [patent_app_date] => 2000-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2725 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20020064956.pdf [firstpage_image] =>[orig_patent_app_number] => 09725091 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/725091
METHOD OF FORMING A STORAGE NODE OF A CAPACITOR Nov 28, 2000 Abandoned
Array ( [id] => 1594662 [patent_doc_number] => 06383937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method of fabricating a silicon island' [patent_app_type] => B1 [patent_app_number] => 09/715475 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2155 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383937.pdf [firstpage_image] =>[orig_patent_app_number] => 09715475 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715475
Method of fabricating a silicon island Nov 16, 2000 Issued
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