Search

William B. Chou

Examiner (ID: 15166, Phone: (571)270-3367 , Office: P/3779 )

Most Active Art Unit
3795
Art Unit(s)
3779, 3795
Total Applications
590
Issued Applications
403
Pending Applications
53
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 713129 [patent_doc_number] => 07062578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Flexible processing hardware architecture' [patent_app_type] => utility [patent_app_number] => 09/977413 [patent_app_country] => US [patent_app_date] => 2001-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4958 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/062/07062578.pdf [firstpage_image] =>[orig_patent_app_number] => 09977413 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/977413
Flexible processing hardware architecture Oct 14, 2001 Issued
Array ( [id] => 1075126 [patent_doc_number] => 06839794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-04 [patent_title] => 'Method and system to map a service level associated with a packet to one of a number of data streams at an interconnect device' [patent_app_type] => utility [patent_app_number] => 09/977529 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10782 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839794.pdf [firstpage_image] =>[orig_patent_app_number] => 09977529 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/977529
Method and system to map a service level associated with a packet to one of a number of data streams at an interconnect device Oct 11, 2001 Issued
Array ( [id] => 794293 [patent_doc_number] => 06983343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-03 [patent_title] => 'Partitioning of storage channels using programmable switches' [patent_app_type] => utility [patent_app_number] => 09/972438 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4924 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/983/06983343.pdf [firstpage_image] =>[orig_patent_app_number] => 09972438 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/972438
Partitioning of storage channels using programmable switches Oct 4, 2001 Issued
Array ( [id] => 713161 [patent_doc_number] => 07062591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Controller data sharing using a modular DMA architecture' [patent_app_type] => utility [patent_app_number] => 09/967126 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8282 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/062/07062591.pdf [firstpage_image] =>[orig_patent_app_number] => 09967126 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967126
Controller data sharing using a modular DMA architecture Sep 27, 2001 Issued
Array ( [id] => 1116093 [patent_doc_number] => 06804573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Automatically generating embroidery designs from a scanned image' [patent_app_type] => B2 [patent_app_number] => 09/950521 [patent_app_country] => US [patent_app_date] => 2001-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 12013 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804573.pdf [firstpage_image] =>[orig_patent_app_number] => 09950521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/950521
Automatically generating embroidery designs from a scanned image Sep 9, 2001 Issued
Array ( [id] => 1088539 [patent_doc_number] => 06832280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Data processing system having an adaptive priority controller' [patent_app_type] => B2 [patent_app_number] => 09/927123 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8378 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/832/06832280.pdf [firstpage_image] =>[orig_patent_app_number] => 09927123 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927123
Data processing system having an adaptive priority controller Aug 9, 2001 Issued
Array ( [id] => 1030556 [patent_doc_number] => 06883050 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-19 [patent_title] => 'Optimized POD module/host interface' [patent_app_type] => utility [patent_app_number] => 09/925362 [patent_app_country] => US [patent_app_date] => 2001-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2073 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/883/06883050.pdf [firstpage_image] =>[orig_patent_app_number] => 09925362 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925362
Optimized POD module/host interface Aug 8, 2001 Issued
Array ( [id] => 1180850 [patent_doc_number] => 06754756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'GPS card reader' [patent_app_type] => B2 [patent_app_number] => 09/924994 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1031 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754756.pdf [firstpage_image] =>[orig_patent_app_number] => 09924994 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/924994
GPS card reader Aug 7, 2001 Issued
Array ( [id] => 7321118 [patent_doc_number] => 20040225784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Structure and method for extended bus and bridge in the extended bus' [patent_app_type] => new [patent_app_number] => 09/922046 [patent_app_country] => US [patent_app_date] => 2001-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2184 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225784.pdf [firstpage_image] =>[orig_patent_app_number] => 09922046 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/922046
Structure and method for extended bus and bridge in the extended bus Aug 2, 2001 Issued
Array ( [id] => 6717349 [patent_doc_number] => 20030028697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Implementing hardware interrupt event driven mechanism to offer soft real-time universal serial bus' [patent_app_type] => new [patent_app_number] => 09/921862 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6845 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20030028697.pdf [firstpage_image] =>[orig_patent_app_number] => 09921862 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/921862
Implementing hardware interrupt event driven mechanism to offer soft real-time universal serial bus Aug 1, 2001 Issued
Array ( [id] => 713326 [patent_doc_number] => 07062664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Bus management based on bus status' [patent_app_type] => utility [patent_app_number] => 09/917833 [patent_app_country] => US [patent_app_date] => 2001-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 67 [patent_no_of_words] => 24872 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/062/07062664.pdf [firstpage_image] =>[orig_patent_app_number] => 09917833 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/917833
Bus management based on bus status Jul 30, 2001 Issued
Array ( [id] => 6554037 [patent_doc_number] => 20020194414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Method and system for transferring data between a digital camera and a host' [patent_app_type] => new [patent_app_number] => 09/882533 [patent_app_country] => US [patent_app_date] => 2001-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6318 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20020194414.pdf [firstpage_image] =>[orig_patent_app_number] => 09882533 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/882533
Method and system for transferring data between a digital camera and a host Jun 14, 2001 Issued
Array ( [id] => 6948344 [patent_doc_number] => 20010021981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-13 [patent_title] => 'Information processing apparatus having a power saving function' [patent_app_type] => new [patent_app_number] => 09/860586 [patent_app_country] => US [patent_app_date] => 2001-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9661 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20010021981.pdf [firstpage_image] =>[orig_patent_app_number] => 09860586 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/860586
Computer interface architecture having a power saving function May 20, 2001 Issued
Array ( [id] => 735969 [patent_doc_number] => 07043581 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-09 [patent_title] => 'Resource sequester mechanism' [patent_app_type] => utility [patent_app_number] => 09/853446 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 73 [patent_figures_cnt] => 85 [patent_no_of_words] => 32055 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043581.pdf [firstpage_image] =>[orig_patent_app_number] => 09853446 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/853446
Resource sequester mechanism May 10, 2001 Issued
Array ( [id] => 1169721 [patent_doc_number] => 06766399 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Application programming interface for temporary release of associated file locks on storage devices' [patent_app_type] => B1 [patent_app_number] => 09/852414 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3876 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/766/06766399.pdf [firstpage_image] =>[orig_patent_app_number] => 09852414 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/852414
Application programming interface for temporary release of associated file locks on storage devices May 9, 2001 Issued
Array ( [id] => 6424528 [patent_doc_number] => 20020184423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Mobile communication device having a prioritized interrupt controller' [patent_app_type] => new [patent_app_number] => 09/853333 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9502 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184423.pdf [firstpage_image] =>[orig_patent_app_number] => 09853333 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/853333
Mobile communication device having a prioritized interrupt controller May 9, 2001 Issued
Array ( [id] => 1178785 [patent_doc_number] => 06757761 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Multi-processor architecture for parallel signal and image processing' [patent_app_type] => B1 [patent_app_number] => 09/850939 [patent_app_country] => US [patent_app_date] => 2001-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4668 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757761.pdf [firstpage_image] =>[orig_patent_app_number] => 09850939 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/850939
Multi-processor architecture for parallel signal and image processing May 7, 2001 Issued
Array ( [id] => 6892559 [patent_doc_number] => 20010018721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Upgrade card for a computer system' [patent_app_type] => new [patent_app_number] => 09/848485 [patent_app_country] => US [patent_app_date] => 2001-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14650 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20010018721.pdf [firstpage_image] =>[orig_patent_app_number] => 09848485 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/848485
Upgrade card for a computer system May 2, 2001 Abandoned
Array ( [id] => 1097301 [patent_doc_number] => 06826647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-30 [patent_title] => 'Voice operated communications interface' [patent_app_type] => B1 [patent_app_number] => 09/847943 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3438 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/826/06826647.pdf [firstpage_image] =>[orig_patent_app_number] => 09847943 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/847943
Voice operated communications interface May 1, 2001 Issued
Array ( [id] => 962173 [patent_doc_number] => 06952749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-04 [patent_title] => 'Multiprocessor interrupt handling system and method' [patent_app_type] => utility [patent_app_number] => 09/849885 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6315 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/952/06952749.pdf [firstpage_image] =>[orig_patent_app_number] => 09849885 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/849885
Multiprocessor interrupt handling system and method May 1, 2001 Issued
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