
William B. Partridge
Examiner (ID: 11002, Phone: (571)270-1402 , Office: P/2183 )
| Most Active Art Unit | 2183 |
| Art Unit(s) | 2812, 2183 |
| Total Applications | 515 |
| Issued Applications | 410 |
| Pending Applications | 5 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5891907
[patent_doc_number] => 20060277395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-07
[patent_title] => 'Processor performance monitoring'
[patent_app_type] => utility
[patent_app_number] => 11/145601
[patent_app_country] => US
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Array
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[patent_issue_date] => 2006-11-30
[patent_title] => 'Branch prediction control'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/139984 | Branch prediction apparatus for repurposing a branch to instruction set as a non-predicted branch | May 30, 2005 | Issued |
Array
(
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[patent_doc_number] => 07774582
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[patent_issue_date] => 2010-08-10
[patent_title] => 'Result bypassing to override a data hazard within a superscalar processor'
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[patent_app_date] => 2005-05-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/137792 | Result bypassing to override a data hazard within a superscalar processor | May 25, 2005 | Issued |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2012-08-21
[patent_title] => 'Methods and apparatus for dynamically switching processor mode'
[patent_app_type] => utility
[patent_app_number] => 11/132658
[patent_app_country] => US
[patent_app_date] => 2005-05-19
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Array
(
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[patent_issue_date] => 2006-11-16
[patent_title] => 'Processor having efficient function estimate instructions'
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Array
(
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[patent_title] => 'Unpack instruction'
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[firstpage_image] =>[orig_patent_app_number] => 11116918
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/116918 | Unpack instruction | Apr 27, 2005 | Abandoned |
Array
(
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[firstpage_image] =>[orig_patent_app_number] => 11116897
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/116897 | Pack instruction | Apr 27, 2005 | Abandoned |
Array
(
[id] => 5822083
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[patent_title] => 'Memory access instruction with optional error check'
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[patent_app_number] => 11/116893
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[firstpage_image] =>[orig_patent_app_number] => 11116893
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/116893 | Memory access instruction with optional error check | Apr 27, 2005 | Abandoned |
Array
(
[id] => 5927919
[patent_doc_number] => 20060242390
[patent_country] => US
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[patent_title] => 'Advanced load address table buffer'
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[firstpage_image] =>[orig_patent_app_number] => 11114754
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/114754 | Advanced load address table buffer | Apr 25, 2005 | Abandoned |
Array
(
[id] => 6962543
[patent_doc_number] => 20050216779
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[patent_issue_date] => 2005-09-29
[patent_title] => 'Device and method for managing a standby state of microprocessor'
[patent_app_type] => utility
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[patent_app_date] => 2005-03-16
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[firstpage_image] =>[orig_patent_app_number] => 11083350
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/083350 | Device and method for managing a standby state of microprocessor | Mar 15, 2005 | Abandoned |
Array
(
[id] => 5143979
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[patent_title] => 'Method and structure for explicit software control of data speculation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/082281 | Method and structure for explicit software control of data speculation | Mar 15, 2005 | Abandoned |
Array
(
[id] => 245086
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[patent_title] => 'Method and structure for concurrent branch prediction in a processor'
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Array
(
[id] => 7006790
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[patent_title] => 'Array-type computer processor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/049305 | Array—type computer processor with reduced instruction storage | Feb 2, 2005 | Issued |
Array
(
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/024843 | Memory control circuit and microprocessory system for pre-fetching instructions | Dec 29, 2004 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/990800 | Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements | Nov 16, 2004 | Issued |