Search

William C. Trapanese

Examiner (ID: 10425, Phone: (571)270-3304 , Office: P/2171 )

Most Active Art Unit
2171
Art Unit(s)
2826, 2812, 2171
Total Applications
745
Issued Applications
529
Pending Applications
89
Abandoned Applications
147

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19796438 [patent_doc_number] => 12237410 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-25 [patent_title] => Trench gate silicon carbide MOSFET device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 18/937369 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 3824 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937369 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/937369
Trench gate silicon carbide MOSFET device and fabrication method thereof Nov 4, 2024 Issued
Array ( [id] => 19758111 [patent_doc_number] => 20250046676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/756248 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756248 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/756248
SEMICONDUCTOR DEVICE Jun 26, 2024 Pending
Array ( [id] => 20047064 [patent_doc_number] => 20250185286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => TRENCH POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/738741 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738741 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/738741
TRENCH POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Jun 9, 2024 Pending
Array ( [id] => 20397067 [patent_doc_number] => 20250372542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SEMICONDUCTOR STRUCTURE, AND METHOD FOR FABRICATING A STACKED DIE [patent_app_type] => utility [patent_app_number] => 18/680621 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680621 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680621
SEMICONDUCTOR STRUCTURE, AND METHOD FOR FABRICATING A STACKED DIE May 30, 2024 Pending
Array ( [id] => 20369419 [patent_doc_number] => 20250359231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/672105 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672105
SEMICONDUCTOR DEVICE May 22, 2024 Pending
Array ( [id] => 19605060 [patent_doc_number] => 20240395940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/664493 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 71758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664493 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664493
SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE May 14, 2024 Pending
Array ( [id] => 20293045 [patent_doc_number] => 20250318288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => HIGH-BANDGAP(EG) STRUCTURE IN PLANAR FLOATING-BASE BIPOLAR PHOTOTRANSISTOR (PT) [patent_app_type] => utility [patent_app_number] => 18/658063 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658063 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/658063
HIGH-BANDGAP(EG) STRUCTURE IN PLANAR FLOATING-BASE BIPOLAR PHOTOTRANSISTOR (PT) May 7, 2024 Pending
Array ( [id] => 20326516 [patent_doc_number] => 20250338604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => LATERALLY DIFFUSED DEPLETION MODE TRANSISTOR AND METHOD OF FABRICATING [patent_app_type] => utility [patent_app_number] => 18/649367 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649367
LATERALLY DIFFUSED DEPLETION MODE TRANSISTOR AND METHOD OF FABRICATING Apr 28, 2024 Pending
Array ( [id] => 20297797 [patent_doc_number] => 20250323040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => METHODS FOR BONDING SEMICONDUCTOR SUBSTRATES [patent_app_type] => utility [patent_app_number] => 18/631810 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631810 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631810
METHODS FOR BONDING SEMICONDUCTOR SUBSTRATES Apr 9, 2024 Pending
Array ( [id] => 20223052 [patent_doc_number] => 20250285983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => PACKAGE STRUCTURE INCLUDING INACTIVE ELEMENT, ASSEMBLY STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/630181 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630181 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630181
PACKAGE STRUCTURE INCLUDING INACTIVE ELEMENT, ASSEMBLY STRUCTURE AND METHOD OF MANUFACTURING THE SAME Apr 8, 2024 Pending
Array ( [id] => 19835826 [patent_doc_number] => 20250087612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => CONDUCTIVE STRUCTURE, SEMICONDUCTOR CHIP INCLUDING THE SAME AND MANUFACTURING METHOD OF THE CONDUCTIVE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/626272 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626272 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626272
CONDUCTIVE STRUCTURE, SEMICONDUCTOR CHIP INCLUDING THE SAME AND MANUFACTURING METHOD OF THE CONDUCTIVE STRUCTURE Apr 2, 2024 Pending
Array ( [id] => 20251243 [patent_doc_number] => 20250300112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => INTEGRATED DEVICE COMPRISING EXTENDED METALLIZATION REGION FOR PILLAR INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 18/609555 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609555
INTEGRATED DEVICE COMPRISING EXTENDED METALLIZATION REGION FOR PILLAR INTERCONNECTS Mar 18, 2024 Pending
Array ( [id] => 20222992 [patent_doc_number] => 20250285923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING A TEST LINE PORTION AND METHOD OF MAKING AND TESTING THE SAME [patent_app_type] => utility [patent_app_number] => 18/600838 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600838 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600838
SEMICONDUCTOR DEVICE INCLUDING A TEST LINE PORTION AND METHOD OF MAKING AND TESTING THE SAME Mar 10, 2024 Pending
Array ( [id] => 19823252 [patent_doc_number] => 20250081459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/601009 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601009 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601009
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME Mar 10, 2024 Pending
Array ( [id] => 19868446 [patent_doc_number] => 20250107232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => THIN-FILM TRANSISTOR STRUCTURE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/600804 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10589 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600804 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600804
THIN-FILM TRANSISTOR STRUCTURE AND ELECTRONIC DEVICE Mar 10, 2024 Pending
Array ( [id] => 20072236 [patent_doc_number] => 20250210458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => THERMAL STRUCTURE FOR SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/600931 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600931 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600931
THERMAL STRUCTURE FOR SEMICONDUCTOR PACKAGE Mar 10, 2024 Pending
Array ( [id] => 19879958 [patent_doc_number] => 20250112215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/600811 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600811 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600811
DISPLAY PANEL AND DISPLAY DEVICE Mar 10, 2024 Pending
Array ( [id] => 20223051 [patent_doc_number] => 20250285982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => PACKAGE STRUCTURE INCLUDING INACTIVE ELEMENT, ASSEMBLY STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/600997 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600997
PACKAGE STRUCTURE INCLUDING INACTIVE ELEMENT, ASSEMBLY STRUCTURE AND METHOD OF MANUFACTURING THE SAME Mar 10, 2024 Pending
Array ( [id] => 19899182 [patent_doc_number] => 12277103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Techniques for collapsing views of content items in a graphical user interface [patent_app_type] => utility [patent_app_number] => 18/584664 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 30 [patent_no_of_words] => 12481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584664 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584664
Techniques for collapsing views of content items in a graphical user interface Feb 21, 2024 Issued
Array ( [id] => 20196826 [patent_doc_number] => 20250273536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => Integrated Active Cooling in Power Packages [patent_app_type] => utility [patent_app_number] => 18/584179 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584179 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584179
Integrated Active Cooling in Power Packages Feb 21, 2024 Pending
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