William F. Kraig

Array ( [id] => 5622868 [patent_doc_number] => 20060261373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Transistor structure and electronics device' [patent_app_type] => utility [patent_app_number] => 11/434269 [patent_app_country] => US [patent_app_date] => 2006-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6879 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20060261373.pdf [firstpage_image] =>[orig_patent_app_number] => 11434269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5017931 [patent_doc_number] => 20070261140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'CARBON NANOTUBE ARRAYS FOR FIELD ELECTRON EMISSION AND METHODS OF MANUFACTURE AND USE' [patent_app_type] => utility [patent_app_number] => 11/381982 [patent_app_country] => US [patent_app_date] => 2006-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20070261140.pdf [firstpage_image] =>[orig_patent_app_number] => 11381982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5098653 [patent_doc_number] => 20070181913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Integrated Circuit Device' [patent_app_type] => utility [patent_app_number] => 11/381348 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 14839 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20070181913.pdf [firstpage_image] =>[orig_patent_app_number] => 11381348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5661640 [patent_doc_number] => 20060252236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/417008 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3157 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20060252236.pdf [firstpage_image] =>[orig_patent_app_number] => 11417008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5605531 [patent_doc_number] => 20060267047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Hetero-junction bipolar transistor and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 11/406581 [patent_app_country] => US [patent_app_date] => 2006-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3348 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20060267047.pdf [firstpage_image] =>[orig_patent_app_number] => 11406581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5675510 [patent_doc_number] => 20060180865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/401400 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9400 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20060180865.pdf [firstpage_image] =>[orig_patent_app_number] => 11401400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5730271 [patent_doc_number] => 20060255385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Memory device of the one-time-programmable type, and programming method for same' [patent_app_type] => utility [patent_app_number] => 11/401101 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4460 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20060255385.pdf [firstpage_image] =>[orig_patent_app_number] => 11401101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5628806 [patent_doc_number] => 20060145274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'NFETs using gate induced stress modulation' [patent_app_type] => utility [patent_app_number] => 11/365502 [patent_app_country] => US [patent_app_date] => 2006-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4080 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145274.pdf [firstpage_image] =>[orig_patent_app_number] => 11365502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4514160 [patent_doc_number] => 07910450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Method of fabricating a precision buried resistor' [patent_app_type] => utility [patent_app_number] => 11/276282 [patent_app_country] => US [patent_app_date] => 2006-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 6163 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/910/07910450.pdf [firstpage_image] =>[orig_patent_app_number] => 11276282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5619533 [patent_doc_number] => 20060189067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Power converter apparatus using silicon germanium bipolar transistor for power switching' [patent_app_type] => utility [patent_app_number] => 11/355182 [patent_app_country] => US [patent_app_date] => 2006-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6394 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189067.pdf [firstpage_image] =>[orig_patent_app_number] => 11355182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5782282 [patent_doc_number] => 20060203533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Semiconductor device and operating method thereof' [patent_app_type] => utility [patent_app_number] => 11/354821 [patent_app_country] => US [patent_app_date] => 2006-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13073 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20060203533.pdf [firstpage_image] =>[orig_patent_app_number] => 11354821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5157473 [patent_doc_number] => 20070170517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'CMOS devices adapted to reduce latchup and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/340342 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8956 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170517.pdf [firstpage_image] =>[orig_patent_app_number] => 11340342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4575507 [patent_doc_number] => 07859112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Additional metal routing in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/331951 [patent_app_country] => US [patent_app_date] => 2006-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2626 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859112.pdf [firstpage_image] =>[orig_patent_app_number] => 11331951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 91869 [patent_doc_number] => 07732245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Photodiode of CMOS image sensor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/319591 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2082 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732245.pdf [firstpage_image] =>[orig_patent_app_number] => 11319591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5019557 [patent_doc_number] => 20070145523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Integrateable capacitors and microcoils and methods of making thereof' [patent_app_type] => utility [patent_app_number] => 11/319056 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13226 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20070145523.pdf [firstpage_image] =>[orig_patent_app_number] => 11319056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5656033 [patent_doc_number] => 20060141769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Method for forming metal line of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/312506 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1989 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20060141769.pdf [firstpage_image] =>[orig_patent_app_number] => 11312506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 259956 [patent_doc_number] => 07572681 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-08-11 [patent_title] => 'Embedded electronic component package' [patent_app_type] => utility [patent_app_number] => 11/298016 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 16457 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/572/07572681.pdf [firstpage_image] =>[orig_patent_app_number] => 11298016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5773964 [patent_doc_number] => 20060102947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Integration of silicon carbide into DRAM cell to improve retention characteristics' [patent_app_type] => utility [patent_app_number] => 11/290432 [patent_app_country] => US [patent_app_date] => 2005-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4807 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20060102947.pdf [firstpage_image] =>[orig_patent_app_number] => 11290432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5611624 [patent_doc_number] => 20060113547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Methods of fabricating memory devices including fuses and load resistors in a peripheral circuit region' [patent_app_type] => utility [patent_app_number] => 11/287956 [patent_app_country] => US [patent_app_date] => 2005-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9097 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20060113547.pdf [firstpage_image] =>[orig_patent_app_number] => 11287956 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5691710 [patent_doc_number] => 20060151855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/285156 [patent_app_country] => US [patent_app_date] => 2005-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20060151855.pdf [firstpage_image] =>[orig_patent_app_number] => 11285156 [rel_patent_id] =>[rel_patent_doc_number] =>)