Search

William G. Wright

Examiner (ID: 2362)

Most Active Art Unit
1106
Art Unit(s)
1754, 1106
Total Applications
637
Issued Applications
554
Pending Applications
0
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20180972 [patent_doc_number] => 20250264930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => SECURE CONTROLLERS FOR REPLACEABLE PRINT APPARATUS COMPONENTS [patent_app_type] => utility [patent_app_number] => 19/181119 [patent_app_country] => US [patent_app_date] => 2025-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19181119 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/181119
SECURE CONTROLLERS FOR REPLACEABLE PRINT APPARATUS COMPONENTS Apr 15, 2025 Pending
Array ( [id] => 20520495 [patent_doc_number] => 20260044604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => METHOD AND APPARATUS FOR VERIFYING INTEGRITY OF FIRMWARE AND RESTORING FIRMWARE [patent_app_type] => utility [patent_app_number] => 18/952266 [patent_app_country] => US [patent_app_date] => 2024-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18952266 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/952266
METHOD AND APPARATUS FOR VERIFYING INTEGRITY OF FIRMWARE AND RESTORING FIRMWARE Nov 18, 2024 Pending
Array ( [id] => 20556804 [patent_doc_number] => 20260056588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => ELECTRONIC CIRCUIT AND METHOD FOR PROVIDING PEAK POWER DEMAND TO THE LOAD END [patent_app_type] => utility [patent_app_number] => 18/946879 [patent_app_country] => US [patent_app_date] => 2024-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18946879 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/946879
ELECTRONIC CIRCUIT AND METHOD FOR PROVIDING PEAK POWER DEMAND TO THE LOAD END Nov 12, 2024 Pending
Array ( [id] => 20601548 [patent_doc_number] => 20260079557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => ELECTRICAL APPLIANCE MONITORING SYSTEM AND ELECTRICAL APPLIANCE MONITORING METHOD [patent_app_type] => utility [patent_app_number] => 18/936997 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936997
ELECTRICAL APPLIANCE MONITORING SYSTEM AND ELECTRICAL APPLIANCE MONITORING METHOD Nov 3, 2024 Pending
Array ( [id] => 20009348 [patent_doc_number] => 20250147570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SEMICONDUCTOR SYSTEM FOR REDUCING LATENCY AND POWER CONSUMPTION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/916306 [patent_app_country] => US [patent_app_date] => 2024-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18916306 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/916306
SEMICONDUCTOR SYSTEM FOR REDUCING LATENCY AND POWER CONSUMPTION AND OPERATING METHOD THEREOF Oct 14, 2024 Pending
Array ( [id] => 20061595 [patent_doc_number] => 20250199817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => NOTEBOOK COMPUTER AND OPERATION METHOD [patent_app_type] => utility [patent_app_number] => 18/916210 [patent_app_country] => US [patent_app_date] => 2024-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18916210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/916210
NOTEBOOK COMPUTER AND OPERATION METHOD Oct 14, 2024 Pending
Array ( [id] => 19867279 [patent_doc_number] => 20250106065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/895474 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18895474 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/895474
COMMUNICATION SYSTEM Sep 24, 2024 Pending
Array ( [id] => 19818746 [patent_doc_number] => 20250076953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => PROCESSING METHOD AND FIRST ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/821872 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821872
PROCESSING METHOD AND FIRST ELECTRONIC DEVICE Aug 29, 2024 Pending
Array ( [id] => 19544996 [patent_doc_number] => 20240362032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => USING INTERCHANGEABLE NON-COMPUTE RESOURCES FOR CLOUD-BASED APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/766126 [patent_app_country] => US [patent_app_date] => 2024-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18766126 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/766126
USING INTERCHANGEABLE NON-COMPUTE RESOURCES FOR CLOUD-BASED APPLICATIONS Jul 7, 2024 Pending
Array ( [id] => 19978715 [patent_doc_number] => 12346190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Semiconductor memory device, electronic device and method for setting the same [patent_app_type] => utility [patent_app_number] => 18/764639 [patent_app_country] => US [patent_app_date] => 2024-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 4622 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764639 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/764639
Semiconductor memory device, electronic device and method for setting the same Jul 4, 2024 Issued
Array ( [id] => 20395052 [patent_doc_number] => 20250370527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => CENTRALIZED PLATFORM-AGNOSTIC POWER LIMIT MANAGEMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 18/678365 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678365 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678365
CENTRALIZED PLATFORM-AGNOSTIC POWER LIMIT MANAGEMENT SYSTEM May 29, 2024 Pending
Array ( [id] => 19617110 [patent_doc_number] => 20240402790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND COMPUTER-READABLE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/670873 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670873 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670873
INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND COMPUTER-READABLE MEDIUM May 21, 2024 Pending
Array ( [id] => 19434389 [patent_doc_number] => 20240302887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ASSET CONTROLLER FOR SELECTIVE OPERATION OF ASSETS [patent_app_type] => utility [patent_app_number] => 18/667264 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18667264 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/667264
ASSET CONTROLLER FOR SELECTIVE OPERATION OF ASSETS May 16, 2024 Pending
Array ( [id] => 19450761 [patent_doc_number] => 20240310891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => ACTIVITY SMOOTHENER CIRCUIT CONTROLLING RATES OF CHANGE OF LOCALIZED PROCESSING ACTIVITY IN AN INTEGRATED CIRCUIT (IC), AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/611064 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611064 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/611064
Activity smoothener circuit controlling rates of change of localized processing activity in an integrated circuit (IC), and related methods Mar 19, 2024 Issued
Array ( [id] => 20234603 [patent_doc_number] => 20250291922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => SECURE COMMUNICATIONS IN A FIRMWARE FRAMEWORK [patent_app_type] => utility [patent_app_number] => 18/602324 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602324 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602324
SECURE COMMUNICATIONS IN A FIRMWARE FRAMEWORK Mar 11, 2024 Pending
Array ( [id] => 19283518 [patent_doc_number] => 20240219994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => UNIFIED SEQUENCER CONCURRENCY CONTROLLER FOR A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/601586 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601586 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601586
UNIFIED SEQUENCER CONCURRENCY CONTROLLER FOR A MEMORY SUB-SYSTEM Mar 10, 2024 Pending
Array ( [id] => 19794766 [patent_doc_number] => 12235712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Dynamically changing data access bandwidth by selectively enabling and disabling data links [patent_app_type] => utility [patent_app_number] => 18/535953 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 19277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18535953 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/535953
Dynamically changing data access bandwidth by selectively enabling and disabling data links Dec 10, 2023 Issued
Array ( [id] => 19334094 [patent_doc_number] => 20240248524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => Power Management of a Power Regulator in a Processor During High Current Events [patent_app_type] => utility [patent_app_number] => 18/525055 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/525055
Power Management of a Power Regulator in a Processor During High Current Events Nov 29, 2023 Pending
Array ( [id] => 20034765 [patent_doc_number] => 20250172987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => ELECTRONIC DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/519079 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519079 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/519079
ELECTRONIC DEVICE AND OPERATING METHOD THEREOF Nov 26, 2023 Abandoned
Array ( [id] => 20018325 [patent_doc_number] => 20250156547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => BIOS SETTINGS RUNTIME MODIFICATION AUTHENTICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/506730 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506730
BIOS SETTINGS RUNTIME MODIFICATION AUTHENTICATION SYSTEM Nov 9, 2023 Issued
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