| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3513671
[patent_doc_number] => 05587600
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Series MOS ROM with tapered oxide side walls'
[patent_app_type] => 1
[patent_app_number] => 8/636684
[patent_app_country] => US
[patent_app_date] => 1996-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 2235
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/587/05587600.pdf
[firstpage_image] =>[orig_patent_app_number] => 636684
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/636684 | Series MOS ROM with tapered oxide side walls | Apr 22, 1996 | Issued |
Array
(
[id] => 3616966
[patent_doc_number] => 05534732
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Single twist layout and method for paired line conductors of integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/567437
[patent_app_country] => US
[patent_app_date] => 1995-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 17
[patent_no_of_words] => 4123
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/534/05534732.pdf
[firstpage_image] =>[orig_patent_app_number] => 567437
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567437 | Single twist layout and method for paired line conductors of integrated circuits | Dec 3, 1995 | Issued |
| 90/003934 | MONOLITHIC SEMICONDUCTOR SWITCHING DEVICE | Sep 14, 1995 | Issued |
Array
(
[id] => 3616695
[patent_doc_number] => 05534712
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Electrically erasable memory elements characterized by reduced current and improved thermal stability'
[patent_app_type] => 1
[patent_app_number] => 8/517313
[patent_app_country] => US
[patent_app_date] => 1995-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 15175
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/534/05534712.pdf
[firstpage_image] =>[orig_patent_app_number] => 517313
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/517313 | Electrically erasable memory elements characterized by reduced current and improved thermal stability | Aug 20, 1995 | Issued |
Array
(
[id] => 3704459
[patent_doc_number] => 05596522
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Homogeneous compositions of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements'
[patent_app_type] => 1
[patent_app_number] => 8/510400
[patent_app_country] => US
[patent_app_date] => 1995-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 20
[patent_no_of_words] => 22441
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/596/05596522.pdf
[firstpage_image] =>[orig_patent_app_number] => 510400
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/510400 | Homogeneous compositions of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements | Aug 1, 1995 | Issued |
Array
(
[id] => 3496170
[patent_doc_number] => 05536947
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Electrically erasable, directly overwritable, multibit single cell memory element and arrays fabricated therefrom'
[patent_app_type] => 1
[patent_app_number] => 8/506630
[patent_app_country] => US
[patent_app_date] => 1995-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 13417
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/536/05536947.pdf
[firstpage_image] =>[orig_patent_app_number] => 506630
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/506630 | Electrically erasable, directly overwritable, multibit single cell memory element and arrays fabricated therefrom | Jul 24, 1995 | Issued |
| 08/493861 | SOLID-STATE IMAGER | Jun 22, 1995 | Abandoned |
| 08/483030 | CAPPED ANNEAL | Jun 6, 1995 | Abandoned |
Array
(
[id] => 3671716
[patent_doc_number] => 05600152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Photoelectric conversion device and its manufacturing method'
[patent_app_type] => 1
[patent_app_number] => 8/466744
[patent_app_country] => US
[patent_app_date] => 1995-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 5496
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600152.pdf
[firstpage_image] =>[orig_patent_app_number] => 466744
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/466744 | Photoelectric conversion device and its manufacturing method | Jun 5, 1995 | Issued |
| 08/461509 | POWER TRANSISTOR DEVICE HAVING ULTRA DEEP INCREASED CONCENTRATION REGION | Jun 4, 1995 | Abandoned |
Array
(
[id] => 3537770
[patent_doc_number] => 05557119
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-17
[patent_title] => 'Field effect transistor having unsaturated drain current characteristic'
[patent_app_type] => 1
[patent_app_number] => 8/449525
[patent_app_country] => US
[patent_app_date] => 1995-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 10
[patent_no_of_words] => 4272
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/557/05557119.pdf
[firstpage_image] =>[orig_patent_app_number] => 449525
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/449525 | Field effect transistor having unsaturated drain current characteristic | May 23, 1995 | Issued |
Array
(
[id] => 3520446
[patent_doc_number] => 05486714
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-23
[patent_title] => 'Trench EEPROM with tunnel oxide in trench'
[patent_app_type] => 1
[patent_app_number] => 8/445939
[patent_app_country] => US
[patent_app_date] => 1995-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 2055
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/486/05486714.pdf
[firstpage_image] =>[orig_patent_app_number] => 445939
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/445939 | Trench EEPROM with tunnel oxide in trench | May 21, 1995 | Issued |
Array
(
[id] => 3616685
[patent_doc_number] => 05534711
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom'
[patent_app_type] => 1
[patent_app_number] => 8/423484
[patent_app_country] => US
[patent_app_date] => 1995-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 17613
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/534/05534711.pdf
[firstpage_image] =>[orig_patent_app_number] => 423484
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/423484 | Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom | Apr 18, 1995 | Issued |
| 08/411495 | ENHANCED PLANARIZATION TECHNIQUE FOR AN INTEGRATED CIRCUIT | Mar 27, 1995 | Abandoned |
| 08/410393 | INPUT/OUTPUT PROTECTION CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME | Mar 26, 1995 | Abandoned |
| 08/408725 | SEMICONDUCTOR DEVICE | Mar 21, 1995 | Abandoned |
| 08/405391 | SEMICONDUCTOR MEMORY AND A METHOD OF MANUFACTURING THE SAME | Mar 14, 1995 | Abandoned |
Array
(
[id] => 3523901
[patent_doc_number] => 05530267
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Article comprising heteroepitaxial III-V nitride semiconductor material on a substrate'
[patent_app_type] => 1
[patent_app_number] => 8/403329
[patent_app_country] => US
[patent_app_date] => 1995-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3429
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530267.pdf
[firstpage_image] =>[orig_patent_app_number] => 403329
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/403329 | Article comprising heteroepitaxial III-V nitride semiconductor material on a substrate | Mar 13, 1995 | Issued |
| 08/404117 | READ ONLY MEMORY DEVICE | Mar 13, 1995 | Abandoned |
Array
(
[id] => 3638217
[patent_doc_number] => 05610433
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-11
[patent_title] => 'Multi-turn, multi-level IC inductor with crossovers'
[patent_app_type] => 1
[patent_app_number] => 8/404019
[patent_app_country] => US
[patent_app_date] => 1995-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 2490
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 580
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/610/05610433.pdf
[firstpage_image] =>[orig_patent_app_number] => 404019
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/404019 | Multi-turn, multi-level IC inductor with crossovers | Mar 12, 1995 | Issued |