Search

William Larkins

Examiner (ID: 6990)

Most Active Art Unit
2503
Art Unit(s)
2504, 2503
Total Applications
860
Issued Applications
507
Pending Applications
15
Abandoned Applications
338

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2700412 [patent_doc_number] => 05019879 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Electrically-flash-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area' [patent_app_type] => 1 [patent_app_number] => 7/493750 [patent_app_country] => US [patent_app_date] => 1990-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 38 [patent_no_of_words] => 4440 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/019/05019879.pdf [firstpage_image] =>[orig_patent_app_number] => 493750 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/493750
Electrically-flash-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area Mar 14, 1990 Issued
Array ( [id] => 2756791 [patent_doc_number] => 05021848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-04 [patent_title] => 'Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof' [patent_app_type] => 1 [patent_app_number] => 7/492113 [patent_app_country] => US [patent_app_date] => 1990-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 38 [patent_no_of_words] => 4515 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/021/05021848.pdf [firstpage_image] =>[orig_patent_app_number] => 492113 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/492113
Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof Mar 12, 1990 Issued
07/492700 ENHANCED MOBILITY METAL OXIDE SEMICONDUCTOR DEVICES AND METHOD FOR FABRICATING THE SAME Mar 12, 1990 Abandoned
Array ( [id] => 2725305 [patent_doc_number] => 05053993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Master slice type semiconductor integrated circuit having sea of gates' [patent_app_type] => 1 [patent_app_number] => 7/490397 [patent_app_country] => US [patent_app_date] => 1990-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 38 [patent_no_of_words] => 6870 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053993.pdf [firstpage_image] =>[orig_patent_app_number] => 490397 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/490397
Master slice type semiconductor integrated circuit having sea of gates Mar 7, 1990 Issued
Array ( [id] => 2867841 [patent_doc_number] => 05083185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-21 [patent_title] => 'Surge absorption device' [patent_app_type] => 1 [patent_app_number] => 7/488457 [patent_app_country] => US [patent_app_date] => 1990-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 43 [patent_no_of_words] => 17118 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/083/05083185.pdf [firstpage_image] =>[orig_patent_app_number] => 488457 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/488457
Surge absorption device Feb 25, 1990 Issued
07/485806 SYMMETRIC VERTICAL MOS TRANSISTOR WITH IMPROVED HIGH VOLTAGE OPERATION Feb 22, 1990 Abandoned
Array ( [id] => 2717149 [patent_doc_number] => 05017977 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Dual EPROM cells on trench walls with virtual ground buried bit lines' [patent_app_type] => 1 [patent_app_number] => 7/471019 [patent_app_country] => US [patent_app_date] => 1990-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2010 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017977.pdf [firstpage_image] =>[orig_patent_app_number] => 471019 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/471019
Dual EPROM cells on trench walls with virtual ground buried bit lines Jan 18, 1990 Issued
Array ( [id] => 2978561 [patent_doc_number] => 05182469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Integrated circuit having bipolar transistors and field effect transistors respectively using potentials of opposite polarities relative to substrate' [patent_app_type] => 1 [patent_app_number] => 7/460688 [patent_app_country] => US [patent_app_date] => 1990-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4177 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182469.pdf [firstpage_image] =>[orig_patent_app_number] => 460688 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/460688
Integrated circuit having bipolar transistors and field effect transistors respectively using potentials of opposite polarities relative to substrate Jan 3, 1990 Issued
Array ( [id] => 2855137 [patent_doc_number] => 05107316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-21 [patent_title] => 'Catoptrical opto-electronic gas sensor' [patent_app_type] => 1 [patent_app_number] => 7/458031 [patent_app_country] => US [patent_app_date] => 1989-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2308 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/107/05107316.pdf [firstpage_image] =>[orig_patent_app_number] => 458031 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/458031
Catoptrical opto-electronic gas sensor Dec 27, 1989 Issued
Array ( [id] => 2676186 [patent_doc_number] => 04999691 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'Integrated circuit with stacked MOS field effect transistors' [patent_app_type] => 1 [patent_app_number] => 7/453090 [patent_app_country] => US [patent_app_date] => 1989-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2572 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999691.pdf [firstpage_image] =>[orig_patent_app_number] => 453090 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/453090
Integrated circuit with stacked MOS field effect transistors Dec 21, 1989 Issued
Array ( [id] => 3490702 [patent_doc_number] => 05426311 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-20 [patent_title] => 'Solid-state variable-conductance device' [patent_app_type] => 1 [patent_app_number] => 7/452186 [patent_app_country] => US [patent_app_date] => 1989-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5195 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/426/05426311.pdf [firstpage_image] =>[orig_patent_app_number] => 452186 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/452186
Solid-state variable-conductance device Dec 17, 1989 Issued
07/449347 SEMICONDUCTOR MEMORY DEVICE HAVING TRENCHED CAPACITOR Dec 12, 1989 Abandoned
Array ( [id] => 2754218 [patent_doc_number] => 05016067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-14 [patent_title] => 'Vertical MOS transistor' [patent_app_type] => 1 [patent_app_number] => 7/449124 [patent_app_country] => US [patent_app_date] => 1989-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 6563 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/016/05016067.pdf [firstpage_image] =>[orig_patent_app_number] => 449124 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/449124
Vertical MOS transistor Dec 7, 1989 Issued
Array ( [id] => 2754234 [patent_doc_number] => 05016068 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-14 [patent_title] => 'Vertical floating-gate transistor' [patent_app_type] => 1 [patent_app_number] => 7/449135 [patent_app_country] => US [patent_app_date] => 1989-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3457 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/016/05016068.pdf [firstpage_image] =>[orig_patent_app_number] => 449135 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/449135
Vertical floating-gate transistor Dec 7, 1989 Issued
Array ( [id] => 2717516 [patent_doc_number] => 05017997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Integrated circuit with high output current I.sup.2 L transistor' [patent_app_type] => 1 [patent_app_number] => 7/445897 [patent_app_country] => US [patent_app_date] => 1989-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2695 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017997.pdf [firstpage_image] =>[orig_patent_app_number] => 445897 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/445897
Integrated circuit with high output current I.sup.2 L transistor Nov 30, 1989 Issued
07/441807 SUBSTANTIALLY FACET-FREE SELECTIVE EPITAXIAL GROWTH PROCESS Nov 26, 1989 Abandoned
07/440479 SEMICONDUCTOR INTEGRATED CIRCUIT Nov 20, 1989 Abandoned
07/439200 COMPLEMENTARY BIMOS(CBIMOS)DEVICES Nov 19, 1989 Abandoned
90/001882 PHOTODETECTION AND CURRENT CONTROL DEVICES Oct 31, 1989 Issued
07/428897 HIGH-SPEED AND HIGH-DENSITY SEMICONDUCTOR MEMORY Oct 29, 1989 Abandoned
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