William Larkins

Array ( [id] => 2663324 [patent_doc_number] => 04929991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-29 [patent_title] => 'Rugged lateral DMOS transistor structure' [patent_app_type] => 1 [patent_app_number] => 7/334806 [patent_app_country] => US [patent_app_date] => 1989-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3060 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/929/04929991.pdf [firstpage_image] =>[orig_patent_app_number] => 334806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2675058 [patent_doc_number] => 04935805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-19 [patent_title] => 'T-type undercut electrical contact on a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 7/332876 [patent_app_country] => US [patent_app_date] => 1989-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 1531 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/935/04935805.pdf [firstpage_image] =>[orig_patent_app_number] => 332876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2528168 [patent_doc_number] => 04885625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-05 [patent_title] => 'Integrated circuit chip manufacture' [patent_app_type] => 1 [patent_app_number] => 7/330952 [patent_app_country] => US [patent_app_date] => 1989-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3245 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/885/04885625.pdf [firstpage_image] =>[orig_patent_app_number] => 330952 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2604573 [patent_doc_number] => 04965651 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-23 [patent_title] => 'CMOS logic array layout' [patent_app_type] => 1 [patent_app_number] => 7/330942 [patent_app_country] => US [patent_app_date] => 1989-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 11431 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/965/04965651.pdf [firstpage_image] =>[orig_patent_app_number] => 330942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2582908 [patent_doc_number] => 04973858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Resonant tunneling semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 7/325620 [patent_app_country] => US [patent_app_date] => 1989-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3615 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/973/04973858.pdf [firstpage_image] =>[orig_patent_app_number] => 325620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2600845 [patent_doc_number] => 04933736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-12 [patent_title] => 'Programmable read-only memory' [patent_app_type] => 1 [patent_app_number] => 7/323068 [patent_app_country] => US [patent_app_date] => 1989-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 7655 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/933/04933736.pdf [firstpage_image] =>[orig_patent_app_number] => 323068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2713801 [patent_doc_number] => 05001530 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Infrared Schottky junction charge coupled device' [patent_app_type] => 1 [patent_app_number] => 7/315246 [patent_app_country] => US [patent_app_date] => 1989-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3510 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001530.pdf [firstpage_image] =>[orig_patent_app_number] => 315246 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2491393 [patent_doc_number] => 04866488 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-12 [patent_title] => 'Ballistic transport filter and device' [patent_app_type] => 1 [patent_app_number] => 7/303084 [patent_app_country] => US [patent_app_date] => 1989-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1815 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/866/04866488.pdf [firstpage_image] =>[orig_patent_app_number] => 303084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2741268 [patent_doc_number] => 05051814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Method of providing stress-free thermally-conducting attachment of two bodies' [patent_app_type] => 1 [patent_app_number] => 7/303049 [patent_app_country] => US [patent_app_date] => 1989-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1927 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051814.pdf [firstpage_image] =>[orig_patent_app_number] => 303049 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2715442 [patent_doc_number] => 05055896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Self-aligned LDD lateral DMOS transistor with high-voltage interconnect capability' [patent_app_type] => 1 [patent_app_number] => 7/285842 [patent_app_country] => US [patent_app_date] => 1988-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4325 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/055/05055896.pdf [firstpage_image] =>[orig_patent_app_number] => 285842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2700557 [patent_doc_number] => 05019886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Semiconductor-based radiation-detector element' [patent_app_type] => 1 [patent_app_number] => 7/282612 [patent_app_country] => US [patent_app_date] => 1988-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2747 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/019/05019886.pdf [firstpage_image] =>[orig_patent_app_number] => 282612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2633712 [patent_doc_number] => 04951112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-21 [patent_title] => 'Triple-poly 4T static ram cell with two independent transistor gates' [patent_app_type] => 1 [patent_app_number] => 7/280782 [patent_app_country] => US [patent_app_date] => 1988-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3647 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/951/04951112.pdf [firstpage_image] =>[orig_patent_app_number] => 280782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2525178 [patent_doc_number] => 04864380 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-05 [patent_title] => 'Edgeless CMOS device' [patent_app_type] => 1 [patent_app_number] => 7/274629 [patent_app_country] => US [patent_app_date] => 1988-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3919 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/864/04864380.pdf [firstpage_image] =>[orig_patent_app_number] => 274629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2532920 [patent_doc_number] => 04888631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-19 [patent_title] => 'Semiconductor dynamic memory device' [patent_app_type] => 1 [patent_app_number] => 7/267679 [patent_app_country] => US [patent_app_date] => 1988-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 5117 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/888/04888631.pdf [firstpage_image] =>[orig_patent_app_number] => 267679 [rel_patent_id] =>[rel_patent_doc_number] =>)