Search

William Larkins

Examiner (ID: 10375)

Most Active Art Unit
2503
Art Unit(s)
2504, 2503
Total Applications
860
Issued Applications
507
Pending Applications
15
Abandoned Applications
338

Applications

Application numberTitle of the applicationFiling DateStatus
06/474002 SEMICONDUCTOR MEMORY Mar 9, 1983 Abandoned
Array ( [id] => 2600958 [patent_doc_number] => 04924114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-08 [patent_title] => 'Temperature sensor' [patent_app_type] => 1 [patent_app_number] => 6/472488 [patent_app_country] => US [patent_app_date] => 1983-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1589 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/924/04924114.pdf [firstpage_image] =>[orig_patent_app_number] => 472488 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/472488
Temperature sensor Mar 6, 1983 Issued
Array ( [id] => 2267945 [patent_doc_number] => 04580157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-01 [patent_title] => 'Semiconductor device having a soft-error preventing structure' [patent_app_type] => 1 [patent_app_number] => 6/469833 [patent_app_country] => US [patent_app_date] => 1983-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2074 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/580/04580157.pdf [firstpage_image] =>[orig_patent_app_number] => 469833 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/469833
Semiconductor device having a soft-error preventing structure Mar 1, 1983 Issued
Array ( [id] => 2224563 [patent_doc_number] => 04609835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-02 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 6/471130 [patent_app_country] => US [patent_app_date] => 1983-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 4193 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/609/04609835.pdf [firstpage_image] =>[orig_patent_app_number] => 471130 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/471130
Semiconductor integrated circuit Feb 28, 1983 Issued
06/468352 PROGRAMMING POWER PATHS IN AN IC BY COMBINED DEPLETION AND ENHANCEMENT IMPLANTS Feb 21, 1983 Abandoned
06/463787 PUNCH THROUGH MODULATED SEMICONDUCTOR DEVICE Feb 3, 1983 Abandoned
06/462401 VOLTAGE-STABLE SUB-MM MOS TRANSISTOR FOR VLSI CIRCUITS Jan 30, 1983 Abandoned
06/451823 METHOD AND STRUCTURE FOR SELECTIVELY INTERCONNECTING ELECTRICAL CIRCUIT ELEMENTS Dec 20, 1982 Abandoned
Array ( [id] => 2364012 [patent_doc_number] => 04658378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-14 [patent_title] => 'Polysilicon resistor with low thermal activation energy' [patent_app_type] => 1 [patent_app_number] => 6/449984 [patent_app_country] => US [patent_app_date] => 1982-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3539 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/658/04658378.pdf [firstpage_image] =>[orig_patent_app_number] => 449984 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/449984
Polysilicon resistor with low thermal activation energy Dec 14, 1982 Issued
Array ( [id] => 2320593 [patent_doc_number] => 04716451 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-29 [patent_title] => 'Semiconductor device with internal gettering region' [patent_app_type] => 1 [patent_app_number] => 6/448724 [patent_app_country] => US [patent_app_date] => 1982-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2526 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/716/04716451.pdf [firstpage_image] =>[orig_patent_app_number] => 448724 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/448724
Semiconductor device with internal gettering region Dec 9, 1982 Issued
06/443554 SEMICONDUCTOR DEVICE Nov 21, 1982 Abandoned
90/000285 TRANSISTOR HAVING EMITTER RESISTORS FOR STABILIZATION AT HIGH POWER OPERATION Nov 7, 1982 Issued
Array ( [id] => 2104085 [patent_doc_number] => 04470062 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-09-04 [patent_title] => 'Semiconductor device having isolation regions' [patent_app_type] => 1 [patent_app_number] => 6/429541 [patent_app_country] => US [patent_app_date] => 1982-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 2709 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/470/04470062.pdf [firstpage_image] =>[orig_patent_app_number] => 429541 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/429541
Semiconductor device having isolation regions Sep 29, 1982 Issued
06/427883 INTEGRATED CIRCUIT DEVICE Sep 28, 1982 Abandoned
Array ( [id] => 2085995 [patent_doc_number] => 04450468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-05-22 [patent_title] => 'Gallium arsenide ISL gate with punched-through bipolar driver transistor' [patent_app_type] => 1 [patent_app_number] => 6/411121 [patent_app_country] => US [patent_app_date] => 1982-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4962 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/450/04450468.pdf [firstpage_image] =>[orig_patent_app_number] => 411121 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/411121
Gallium arsenide ISL gate with punched-through bipolar driver transistor Aug 23, 1982 Issued
06/410786 SEMICONDUCTOR WITH PROTECTIVE SURFACE COATING AND METHOD OF MANUFACTURE THEREOF Aug 22, 1982 Abandoned
Array ( [id] => 2141850 [patent_doc_number] => 04532535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-07-30 [patent_title] => 'Electrically reprogrammable non volatile memory cell floating gate EEPROM with tunneling to substrate region' [patent_app_type] => 1 [patent_app_number] => 6/408275 [patent_app_country] => US [patent_app_date] => 1982-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4399 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/532/04532535.pdf [firstpage_image] =>[orig_patent_app_number] => 408275 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/408275
Electrically reprogrammable non volatile memory cell floating gate EEPROM with tunneling to substrate region Aug 15, 1982 Issued
Array ( [id] => 2319156 [patent_doc_number] => 04700213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-13 [patent_title] => 'Multi-drain enhancement JFET logic (SITL) with complementary MOSFET load' [patent_app_type] => 1 [patent_app_number] => 6/397863 [patent_app_country] => US [patent_app_date] => 1982-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5454 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/700/04700213.pdf [firstpage_image] =>[orig_patent_app_number] => 397863 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/397863
Multi-drain enhancement JFET logic (SITL) with complementary MOSFET load Jul 12, 1982 Issued
Array ( [id] => 2532963 [patent_doc_number] => 04797724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-10 [patent_title] => 'Reducing bipolar parasitic effects in IGFET devices' [patent_app_type] => 1 [patent_app_number] => 6/393891 [patent_app_country] => US [patent_app_date] => 1982-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 6620 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 424 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/797/04797724.pdf [firstpage_image] =>[orig_patent_app_number] => 393891 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/393891
Reducing bipolar parasitic effects in IGFET devices Jun 29, 1982 Issued
06/389909 DEVICES FORMED UTILIZING ORGANIC MATERIALS Jun 17, 1982 Abandoned
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