Search

William Larkins

Examiner (ID: 9708)

Most Active Art Unit
2503
Art Unit(s)
2504, 2503
Total Applications
860
Issued Applications
507
Pending Applications
15
Abandoned Applications
338

Applications

Application numberTitle of the applicationFiling DateStatus
06/209113 SEMICONDUCTOR DEVICE AND FABRIACTING METHOD THEREOF Nov 20, 1980 Abandoned
Array ( [id] => 2364459 [patent_doc_number] => 04667218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-19 [patent_title] => 'NPN transistor with base double doped with arsenic and boron' [patent_app_type] => 1 [patent_app_number] => 6/208399 [patent_app_country] => US [patent_app_date] => 1980-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3233 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/667/04667218.pdf [firstpage_image] =>[orig_patent_app_number] => 208399 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/208399
NPN transistor with base double doped with arsenic and boron Nov 18, 1980 Issued
06/204930 SEMICONDUCTOR DEVICE WITH A MEANS FOR DISCHARGING CARRIERS Nov 6, 1980 Abandoned
06/204725 POLYSILICON INTERCONNECT STRUCTURE FOR COMPLEMENTARY MOS DEVICES Nov 5, 1980 Abandoned
06/203037 CHANNEL BARRIER MODULATED SEMICONDUCTOR DEVICE Nov 2, 1980 Abandoned
Array ( [id] => 2047364 [patent_doc_number] => 04404579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-09-13 [patent_title] => 'Semiconductor device having reduced capacitance and method of fabrication thereof' [patent_app_type] => 1 [patent_app_number] => 6/201102 [patent_app_country] => US [patent_app_date] => 1980-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2192 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/404/04404579.pdf [firstpage_image] =>[orig_patent_app_number] => 201102 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/201102
Semiconductor device having reduced capacitance and method of fabrication thereof Oct 27, 1980 Issued
Array ( [id] => 2350165 [patent_doc_number] => 04656498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-07 [patent_title] => 'Oxide-isolated integrated Schottky logic' [patent_app_type] => 1 [patent_app_number] => 6/200834 [patent_app_country] => US [patent_app_date] => 1980-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2579 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/656/04656498.pdf [firstpage_image] =>[orig_patent_app_number] => 200834 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/200834
Oxide-isolated integrated Schottky logic Oct 26, 1980 Issued
Array ( [id] => 2020820 [patent_doc_number] => 04403240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-09-06 [patent_title] => 'Integrated circuit with at least three ground pads' [patent_app_type] => 1 [patent_app_number] => 6/200459 [patent_app_country] => US [patent_app_date] => 1980-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4063 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/403/04403240.pdf [firstpage_image] =>[orig_patent_app_number] => 200459 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/200459
Integrated circuit with at least three ground pads Oct 23, 1980 Issued
Array ( [id] => 2327097 [patent_doc_number] => 04670769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-02 [patent_title] => 'Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation' [patent_app_type] => 1 [patent_app_number] => 6/200386 [patent_app_country] => US [patent_app_date] => 1980-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3393 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/670/04670769.pdf [firstpage_image] =>[orig_patent_app_number] => 200386 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/200386
Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation Oct 23, 1980 Issued
06/199925 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 22, 1980 Abandoned
Array ( [id] => 2105913 [patent_doc_number] => 04442448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-04-10 [patent_title] => 'Logic integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 6/199268 [patent_app_country] => US [patent_app_date] => 1980-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 25 [patent_no_of_words] => 3472 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/442/04442448.pdf [firstpage_image] =>[orig_patent_app_number] => 199268 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/199268
Logic integrated circuit device Oct 20, 1980 Issued
06/199278 INTEGRATED CIRCUIT DEVICE Oct 20, 1980 Abandoned
Array ( [id] => 2057387 [patent_doc_number] => 04394674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-07-19 [patent_title] => 'Insulated gate field effect transistor' [patent_app_type] => 1 [patent_app_number] => 6/195683 [patent_app_country] => US [patent_app_date] => 1980-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 6450 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/394/04394674.pdf [firstpage_image] =>[orig_patent_app_number] => 195683 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/195683
Insulated gate field effect transistor Oct 8, 1980 Issued
Array ( [id] => 2008518 [patent_doc_number] => 04388632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-06-14 [patent_title] => 'Signal limiting integrated circuit' [patent_app_type] => 1 [patent_app_number] => 6/193788 [patent_app_country] => US [patent_app_date] => 1980-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1046 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/388/04388632.pdf [firstpage_image] =>[orig_patent_app_number] => 193788 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/193788
Signal limiting integrated circuit Oct 2, 1980 Issued
Array ( [id] => 2204529 [patent_doc_number] => 04533934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-08-06 [patent_title] => 'Device structures for high density integrated circuits' [patent_app_type] => 1 [patent_app_number] => 6/192961 [patent_app_country] => US [patent_app_date] => 1980-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 43 [patent_no_of_words] => 11061 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/533/04533934.pdf [firstpage_image] =>[orig_patent_app_number] => 192961 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/192961
Device structures for high density integrated circuits Oct 1, 1980 Issued
Array ( [id] => 2057380 [patent_doc_number] => 04394673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-07-19 [patent_title] => 'Rare earth silicide Schottky barriers' [patent_app_type] => 1 [patent_app_number] => 6/191565 [patent_app_country] => US [patent_app_date] => 1980-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2566 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/394/04394673.pdf [firstpage_image] =>[orig_patent_app_number] => 191565 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/191565
Rare earth silicide Schottky barriers Sep 28, 1980 Issued
Array ( [id] => 2093883 [patent_doc_number] => RE031580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-05-01 [patent_title] => 'Insulated gate field-effect transistor comprising a mesa channel and a thicker surrounding oxide' [patent_app_type] => 2 [patent_app_number] => 6/191031 [patent_app_country] => US [patent_app_date] => 1980-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5443 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/031/RE031580.pdf [firstpage_image] =>[orig_patent_app_number] => 191031 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/191031
Insulated gate field-effect transistor comprising a mesa channel and a thicker surrounding oxide Sep 24, 1980 Issued
06/188436 SEMICONDUCTOR WITH PROTECTIVE SURFACE COATING AND METHOD OF MANUFACTURE THEREOF Sep 18, 1980 Abandoned
Array ( [id] => 2065697 [patent_doc_number] => 04453175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-06-05 [patent_title] => 'MOS Static RAM layout with polysilicon resistors over FET gates' [patent_app_type] => 1 [patent_app_number] => 6/187794 [patent_app_country] => US [patent_app_date] => 1980-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 8202 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 559 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/453/04453175.pdf [firstpage_image] =>[orig_patent_app_number] => 187794 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/187794
MOS Static RAM layout with polysilicon resistors over FET gates Sep 15, 1980 Issued
06/186666 SEMICONDUCTOR DEVICE AND PROCESS FOR PRODUCING THE SAME Sep 11, 1980 Abandoned
Menu