William Larkins

Array ( [id] => 1945746 [patent_doc_number] => 04314268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-02 [patent_title] => 'Integrated circuit with shielded lead patterns' [patent_app_type] => 1 [patent_app_number] => 6/044140 [patent_app_country] => US [patent_app_date] => 1979-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3172 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/314/04314268.pdf [firstpage_image] =>[orig_patent_app_number] => 044140 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1996056 [patent_doc_number] => 04329705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-05-11 [patent_title] => 'VMOS/Bipolar power switching device' [patent_app_type] => 1 [patent_app_number] => 6/040991 [patent_app_country] => US [patent_app_date] => 1979-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 7112 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/329/04329705.pdf [firstpage_image] =>[orig_patent_app_number] => 040991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1878676 [patent_doc_number] => 04286175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-08-25 [patent_title] => 'VMOS/Bipolar dual-triggered switch' [patent_app_type] => 1 [patent_app_number] => 6/040989 [patent_app_country] => US [patent_app_date] => 1979-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 7320 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/286/04286175.pdf [firstpage_image] =>[orig_patent_app_number] => 040989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1883980 [patent_doc_number] => 04303841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-12-01 [patent_title] => 'VMOS/Bipolar power switch' [patent_app_type] => 1 [patent_app_number] => 6/041008 [patent_app_country] => US [patent_app_date] => 1979-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 7070 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/303/04303841.pdf [firstpage_image] =>[orig_patent_app_number] => 041008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1943158 [patent_doc_number] => 04340898 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-07-20 [patent_title] => 'Barrier-layer capacitor and process for the production thereof' [patent_app_type] => 1 [patent_app_number] => 6/036415 [patent_app_country] => US [patent_app_date] => 1979-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2197 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/340/04340898.pdf [firstpage_image] =>[orig_patent_app_number] => 036415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1899885 [patent_doc_number] => 04266236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-05-05 [patent_title] => 'Transistor having emitter resistors for stabilization at high power operation' [patent_app_type] => 1 [patent_app_number] => 6/032821 [patent_app_country] => US [patent_app_date] => 1979-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2385 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/266/04266236.pdf [firstpage_image] =>[orig_patent_app_number] => 032821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1872812 [patent_doc_number] => 04259730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-03-31 [patent_title] => 'IIL With partially spaced collars' [patent_app_type] => 1 [patent_app_number] => 6/027223 [patent_app_country] => US [patent_app_date] => 1979-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 5582 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/259/04259730.pdf [firstpage_image] =>[orig_patent_app_number] => 027223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1865467 [patent_doc_number] => 04275406 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-06-23 [patent_title] => 'Monolithic semiconductor pressure sensor, and method of its manufacture' [patent_app_type] => 1 [patent_app_number] => 6/026743 [patent_app_country] => US [patent_app_date] => 1979-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2243 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/275/04275406.pdf [firstpage_image] =>[orig_patent_app_number] => 026743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1893186 [patent_doc_number] => 04288805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-08 [patent_title] => 'Integrated logic gate with NPN inverter, PNP clamp, coupling, Shottky diodes and diffused crossunder' [patent_app_type] => 1 [patent_app_number] => 6/020491 [patent_app_country] => US [patent_app_date] => 1979-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3401 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/288/04288805.pdf [firstpage_image] =>[orig_patent_app_number] => 020491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1925315 [patent_doc_number] => 04272307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-06-09 [patent_title] => 'Integrated circuit with I.sup.2 L and power transistors and method for making' [patent_app_type] => 1 [patent_app_number] => 6/019971 [patent_app_country] => US [patent_app_date] => 1979-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3147 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/272/04272307.pdf [firstpage_image] =>[orig_patent_app_number] => 019971 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1921527 [patent_doc_number] => 04264941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-04-28 [patent_title] => 'Protective circuit for insulated gate field effect transistor integrated circuits' [patent_app_type] => 1 [patent_app_number] => 6/012042 [patent_app_country] => US [patent_app_date] => 1979-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5931 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 420 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/264/04264941.pdf [firstpage_image] =>[orig_patent_app_number] => 012042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1914675 [patent_doc_number] => 04271421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-06-02 [patent_title] => 'High density N-channel silicon gate read only memory' [patent_app_type] => 1 [patent_app_number] => 6/011735 [patent_app_country] => US [patent_app_date] => 1979-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 16 [patent_no_of_words] => 2482 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/271/04271421.pdf [firstpage_image] =>[orig_patent_app_number] => 011735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2086018 [patent_doc_number] => 04450470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-05-22 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 6/011582 [patent_app_country] => US [patent_app_date] => 1979-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 19 [patent_no_of_words] => 4437 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/450/04450470.pdf [firstpage_image] =>[orig_patent_app_number] => 011582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1933298 [patent_doc_number] => 04262299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-04-14 [patent_title] => 'Semiconductor-on-insulator device and method for its manufacture' [patent_app_type] => 1 [patent_app_number] => 6/007578 [patent_app_country] => US [patent_app_date] => 1979-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2858 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/262/04262299.pdf [firstpage_image] =>[orig_patent_app_number] => 007578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1885676 [patent_doc_number] => 04296336 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-20 [patent_title] => 'Switching circuit and method for avoiding secondary breakdown' [patent_app_type] => 1 [patent_app_number] => 6/005157 [patent_app_country] => US [patent_app_date] => 1979-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 6465 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/296/04296336.pdf [firstpage_image] =>[orig_patent_app_number] => 005157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1913302 [patent_doc_number] => 04278989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-07-14 [patent_title] => 'Semiconductor device having cross wires' [patent_app_type] => 1 [patent_app_number] => 6/003286 [patent_app_country] => US [patent_app_date] => 1979-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3036 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/278/04278989.pdf [firstpage_image] =>[orig_patent_app_number] => 003286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1885928 [patent_doc_number] => 04274105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-06-16 [patent_title] => 'MOSFET Substrate sensitivity control' [patent_app_type] => 1 [patent_app_number] => 5/974594 [patent_app_country] => US [patent_app_date] => 1978-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1505 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/274/04274105.pdf [firstpage_image] =>[orig_patent_app_number] => 974594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1912861 [patent_doc_number] => 04278897 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-07-14 [patent_title] => 'Large scale semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 5/974147 [patent_app_country] => US [patent_app_date] => 1978-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 6496 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/278/04278897.pdf [firstpage_image] =>[orig_patent_app_number] => 974147 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1921384 [patent_doc_number] => 04264914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-04-28 [patent_title] => 'Wide-band-gap, alkaline-earth-oxide semiconductor and devices utilizing same' [patent_app_type] => 1 [patent_app_number] => 5/973660 [patent_app_country] => US [patent_app_date] => 1978-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3885 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/264/04264914.pdf [firstpage_image] =>[orig_patent_app_number] => 973660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1928350 [patent_doc_number] => 04285001 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-08-18 [patent_title] => 'Monolithic distributed resistor-capacitor device and circuit utilizing polycrystalline semiconductor material' [patent_app_type] => 1 [patent_app_number] => 5/972738 [patent_app_country] => US [patent_app_date] => 1978-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 3214 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/285/04285001.pdf [firstpage_image] =>[orig_patent_app_number] => 972738 [rel_patent_id] =>[rel_patent_doc_number] =>)