Search

William M. Pierce

Examiner (ID: 18691, Phone: (571)272-4414 , Office: P/3711 )

Most Active Art Unit
3711
Art Unit(s)
3711, 3304
Total Applications
2380
Issued Applications
1405
Pending Applications
120
Abandoned Applications
862

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19007958 [patent_doc_number] => 20240072029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/894095 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/894095
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Aug 22, 2022 Pending
Array ( [id] => 18991808 [patent_doc_number] => 20240063777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => HVIC DEVICE WITH COMBINED LEVEL SHIFTER AND BOOST DIODE IN JUNCTION TERMINATION REGION [patent_app_type] => utility [patent_app_number] => 17/892007 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892007
HVIC DEVICE WITH COMBINED LEVEL SHIFTER AND BOOST DIODE IN JUNCTION TERMINATION REGION Aug 18, 2022 Pending
Array ( [id] => 18991099 [patent_doc_number] => 20240063068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR DEVICE ASSEMBLIES WITH CAVITY-EMBEDDED CUBES AND LOGIC-SUPPORTING INTERPOSERS [patent_app_type] => utility [patent_app_number] => 17/892036 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892036
SEMICONDUCTOR DEVICE ASSEMBLIES WITH CAVITY-EMBEDDED CUBES AND LOGIC-SUPPORTING INTERPOSERS Aug 18, 2022 Pending
Array ( [id] => 20346028 [patent_doc_number] => 12469763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Package with improved heat dissipation efficiency and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/891218 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 32 [patent_no_of_words] => 3318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891218
Package with improved heat dissipation efficiency and method for forming the same Aug 18, 2022 Issued
Array ( [id] => 18943603 [patent_doc_number] => 20240038742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/891516 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891516 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891516
SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE DEVICE Aug 18, 2022 Abandoned
Array ( [id] => 18991161 [patent_doc_number] => 20240063130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/889404 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889404
PACKAGE STRUCTURE AND FABRICATING METHOD THEREOF Aug 16, 2022 Pending
Array ( [id] => 18061759 [patent_doc_number] => 20220392846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/887557 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887557 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887557
Semiconductor package Aug 14, 2022 Issued
Array ( [id] => 18040135 [patent_doc_number] => 20220384352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => SEMICONDUCTOR DEVICE, STACKED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/884579 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884579 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884579
Semiconductor device, stacked semiconductor device and manufacturing method of semiconductor device Aug 9, 2022 Issued
Array ( [id] => 18040139 [patent_doc_number] => 20220384356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => INTEGRATED FAN-OUT PACKAGING [patent_app_type] => utility [patent_app_number] => 17/883568 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/883568
Integrated fan-out packaging Aug 7, 2022 Issued
Array ( [id] => 18959109 [patent_doc_number] => 20240047436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/880687 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880687 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880687
Semiconductor package and manufacturing method thereof Aug 3, 2022 Issued
Array ( [id] => 20536783 [patent_doc_number] => 12553854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Device and method for detecting miniature targets in a fluid sample [patent_app_type] => utility [patent_app_number] => 17/876695 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 45 [patent_no_of_words] => 7610 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876695
Device and method for detecting miniature targets in a fluid sample Jul 28, 2022 Issued
Array ( [id] => 20346072 [patent_doc_number] => 12469807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Fan-out package structures with cascaded openings in enhancement layer [patent_app_type] => utility [patent_app_number] => 17/814836 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814836 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814836
Fan-out package structures with cascaded openings in enhancement layer Jul 25, 2022 Issued
Array ( [id] => 17986060 [patent_doc_number] => 20220352097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/867388 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867388 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/867388
Semiconductor package Jul 17, 2022 Issued
Array ( [id] => 17986032 [patent_doc_number] => 20220352069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR DEVICE WITH SOURCE/DRAIN VIA [patent_app_type] => utility [patent_app_number] => 17/865962 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865962 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865962
Semiconductor device with source/drain via Jul 14, 2022 Issued
Array ( [id] => 20375280 [patent_doc_number] => 12482724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Package structure and package system [patent_app_type] => utility [patent_app_number] => 17/863047 [patent_app_country] => US [patent_app_date] => 2022-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863047 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/863047
Package structure and package system Jul 11, 2022 Issued
Array ( [id] => 20267135 [patent_doc_number] => 12438134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Package substrate and semiconductor package including the same [patent_app_type] => utility [patent_app_number] => 17/862586 [patent_app_country] => US [patent_app_date] => 2022-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 3569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/862586
Package substrate and semiconductor package including the same Jul 11, 2022 Issued
Array ( [id] => 17963666 [patent_doc_number] => 20220344247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => ULTRA-THIN, HYPER-DENSITY SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 17/862300 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/862300
ULTRA-THIN, HYPER-DENSITY SEMICONDUCTOR PACKAGES Jul 10, 2022 Pending
Array ( [id] => 17949497 [patent_doc_number] => 20220336516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SEMICONDUCTOR PACKAGE AND CAMERA MODULE [patent_app_type] => utility [patent_app_number] => 17/856309 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856309
Semiconductor package and camera module Jun 30, 2022 Issued
Array ( [id] => 17949412 [patent_doc_number] => 20220336431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Integrated Circuit Package and Method [patent_app_type] => utility [patent_app_number] => 17/854386 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854386 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854386
Integrated circuit package and method Jun 29, 2022 Issued
Array ( [id] => 18615905 [patent_doc_number] => 20230282644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => LAYOUT DESIGN FOR RF CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/854646 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854646
LAYOUT DESIGN FOR RF CIRCUIT Jun 29, 2022 Pending
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