Search

William M. Treat

Examiner (ID: 16215)

Most Active Art Unit
2183
Art Unit(s)
2315, 2783, 2302, 2784, 2181, 2183
Total Applications
967
Issued Applications
755
Pending Applications
33
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3760271 [patent_doc_number] => 05717873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Deadlock avoidance mechanism and method for multiple bus topology' [patent_app_type] => 1 [patent_app_number] => 8/734730 [patent_app_country] => US [patent_app_date] => 1996-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6342 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717873.pdf [firstpage_image] =>[orig_patent_app_number] => 734730 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/734730
Deadlock avoidance mechanism and method for multiple bus topology Oct 20, 1996 Issued
Array ( [id] => 3878925 [patent_doc_number] => 05794028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Shared branch prediction structure' [patent_app_type] => 1 [patent_app_number] => 8/731765 [patent_app_country] => US [patent_app_date] => 1996-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 15976 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794028.pdf [firstpage_image] =>[orig_patent_app_number] => 731765 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/731765
Shared branch prediction structure Oct 16, 1996 Issued
Array ( [id] => 3796743 [patent_doc_number] => 05758143 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Method for updating a branch history table in a processor which resolves multiple branches in a single cycle' [patent_app_type] => 1 [patent_app_number] => 8/726963 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2636 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758143.pdf [firstpage_image] =>[orig_patent_app_number] => 726963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726963
Method for updating a branch history table in a processor which resolves multiple branches in a single cycle Oct 6, 1996 Issued
Array ( [id] => 3788418 [patent_doc_number] => 05774710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Cache line branch prediction scheme that shares among sets of a set associative cache' [patent_app_type] => 1 [patent_app_number] => 8/710560 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6405 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774710.pdf [firstpage_image] =>[orig_patent_app_number] => 710560 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/710560
Cache line branch prediction scheme that shares among sets of a set associative cache Sep 18, 1996 Issued
Array ( [id] => 3894952 [patent_doc_number] => 05764994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Method and system for compressing compiled microcode to be executed within a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/711516 [patent_app_country] => US [patent_app_date] => 1996-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3684 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764994.pdf [firstpage_image] =>[orig_patent_app_number] => 711516 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/711516
Method and system for compressing compiled microcode to be executed within a data processing system Sep 15, 1996 Issued
Array ( [id] => 3758095 [patent_doc_number] => 05754786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'System and method for integrated overload control and message distribution' [patent_app_type] => 1 [patent_app_number] => 8/713565 [patent_app_country] => US [patent_app_date] => 1996-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3818 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754786.pdf [firstpage_image] =>[orig_patent_app_number] => 713565 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/713565
System and method for integrated overload control and message distribution Sep 12, 1996 Issued
Array ( [id] => 3972636 [patent_doc_number] => 05978838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Coordination and synchronization of an asymmetric, single-chip, dual multiprocessor' [patent_app_type] => 1 [patent_app_number] => 8/703434 [patent_app_country] => US [patent_app_date] => 1996-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8097 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978838.pdf [firstpage_image] =>[orig_patent_app_number] => 703434 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/703434
Coordination and synchronization of an asymmetric, single-chip, dual multiprocessor Aug 25, 1996 Issued
Array ( [id] => 3853574 [patent_doc_number] => 05761734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Token-based serialisation of instructions in a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 8/689762 [patent_app_country] => US [patent_app_date] => 1996-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 11483 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761734.pdf [firstpage_image] =>[orig_patent_app_number] => 689762 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/689762
Token-based serialisation of instructions in a multiprocessor system Aug 12, 1996 Issued
Array ( [id] => 3894085 [patent_doc_number] => 05764942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Method and system for selective serialization of instruction processing in a superscalar processor system' [patent_app_type] => 1 [patent_app_number] => 8/689437 [patent_app_country] => US [patent_app_date] => 1996-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5572 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764942.pdf [firstpage_image] =>[orig_patent_app_number] => 689437 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/689437
Method and system for selective serialization of instruction processing in a superscalar processor system Aug 11, 1996 Issued
Array ( [id] => 3757973 [patent_doc_number] => 05754778 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Electronic mail system' [patent_app_type] => 1 [patent_app_number] => 8/691864 [patent_app_country] => US [patent_app_date] => 1996-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 6104 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754778.pdf [firstpage_image] =>[orig_patent_app_number] => 691864 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/691864
Electronic mail system Aug 1, 1996 Issued
Array ( [id] => 4198591 [patent_doc_number] => 06038610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Storage of sitemaps at server sites for holding information regarding content' [patent_app_type] => 1 [patent_app_number] => 8/683663 [patent_app_country] => US [patent_app_date] => 1996-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5647 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038610.pdf [firstpage_image] =>[orig_patent_app_number] => 683663 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/683663
Storage of sitemaps at server sites for holding information regarding content Jul 16, 1996 Issued
Array ( [id] => 3701624 [patent_doc_number] => 05664169 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Microprogrammable processor capable of accessing unused portions of control store as fast data memory' [patent_app_type] => 1 [patent_app_number] => 8/680445 [patent_app_country] => US [patent_app_date] => 1996-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6249 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/664/05664169.pdf [firstpage_image] =>[orig_patent_app_number] => 680445 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/680445
Microprogrammable processor capable of accessing unused portions of control store as fast data memory Jul 14, 1996 Issued
Array ( [id] => 3759466 [patent_doc_number] => 05754877 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Extended symmetrical multiprocessor architecture' [patent_app_type] => 1 [patent_app_number] => 8/675363 [patent_app_country] => US [patent_app_date] => 1996-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12205 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754877.pdf [firstpage_image] =>[orig_patent_app_number] => 675363 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/675363
Extended symmetrical multiprocessor architecture Jul 1, 1996 Issued
Array ( [id] => 4201967 [patent_doc_number] => 06094680 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'System and method for managing distributed resources on networks' [patent_app_type] => 1 [patent_app_number] => 8/675464 [patent_app_country] => US [patent_app_date] => 1996-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6365 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094680.pdf [firstpage_image] =>[orig_patent_app_number] => 675464 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/675464
System and method for managing distributed resources on networks Jun 26, 1996 Issued
Array ( [id] => 3841903 [patent_doc_number] => 05784603 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Fast handling of branch delay slots on mispredicted branches' [patent_app_type] => 1 [patent_app_number] => 8/665964 [patent_app_country] => US [patent_app_date] => 1996-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3957 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784603.pdf [firstpage_image] =>[orig_patent_app_number] => 665964 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/665964
Fast handling of branch delay slots on mispredicted branches Jun 18, 1996 Issued
Array ( [id] => 3877401 [patent_doc_number] => 05796934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Fault tolerant client server system' [patent_app_type] => 1 [patent_app_number] => 8/656665 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3836 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796934.pdf [firstpage_image] =>[orig_patent_app_number] => 656665 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/656665
Fault tolerant client server system May 30, 1996 Issued
Array ( [id] => 3909529 [patent_doc_number] => 05835701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Method and apparatus for modifying relocatable object code files and monitoring programs' [patent_app_type] => 1 [patent_app_number] => 8/658910 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7657 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835701.pdf [firstpage_image] =>[orig_patent_app_number] => 658910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/658910
Method and apparatus for modifying relocatable object code files and monitoring programs May 30, 1996 Issued
Array ( [id] => 4121531 [patent_doc_number] => 06058114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Unified network cell scheduler and flow controller' [patent_app_type] => 1 [patent_app_number] => 8/652626 [patent_app_country] => US [patent_app_date] => 1996-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 9006 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058114.pdf [firstpage_image] =>[orig_patent_app_number] => 652626 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652626
Unified network cell scheduler and flow controller May 19, 1996 Issued
Array ( [id] => 3794252 [patent_doc_number] => 05809273 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Instruction predecode and multiple instruction decode' [patent_app_type] => 1 [patent_app_number] => 8/649981 [patent_app_country] => US [patent_app_date] => 1996-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 26702 [patent_no_of_claims] => 83 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809273.pdf [firstpage_image] =>[orig_patent_app_number] => 649981 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649981
Instruction predecode and multiple instruction decode May 15, 1996 Issued
Array ( [id] => 3796554 [patent_doc_number] => 05819056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Instruction buffer organization method and system' [patent_app_type] => 1 [patent_app_number] => 8/649995 [patent_app_country] => US [patent_app_date] => 1996-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 26221 [patent_no_of_claims] => 85 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/819/05819056.pdf [firstpage_image] =>[orig_patent_app_number] => 649995 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649995
Instruction buffer organization method and system May 15, 1996 Issued
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