| Application number | Title of the application | Filing Date | Status |
|---|
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[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Floating point unit pipeline synchronized with processor pipeline'
[patent_app_type] => 1
[patent_app_number] => 8/594763
[patent_app_country] => US
[patent_app_date] => 1996-01-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/594763 | Floating point unit pipeline synchronized with processor pipeline | Jan 30, 1996 | Issued |
Array
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[patent_doc_number] => 05754812
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Out-of-order load/store execution control'
[patent_app_type] => 1
[patent_app_number] => 8/592209
[patent_app_country] => US
[patent_app_date] => 1996-01-26
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[firstpage_image] =>[orig_patent_app_number] => 592209
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/592209 | Out-of-order load/store execution control | Jan 25, 1996 | Issued |
| 08/593765 | INSTRUCTION BUFFER ORGANIZATION METHOD AND SYSTEM | Jan 25, 1996 | Abandoned |
Array
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[id] => 4024699
[patent_doc_number] => 06006277
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Virtual software machine for enabling CICS application software to run on UNIX based computer systems'
[patent_app_type] => 1
[patent_app_number] => 8/599514
[patent_app_country] => US
[patent_app_date] => 1996-01-26
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[firstpage_image] =>[orig_patent_app_number] => 599514
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/599514 | Virtual software machine for enabling CICS application software to run on UNIX based computer systems | Jan 25, 1996 | Issued |
| 08/592208 | INSTRUCTION DECODER INCLUDING EMULATION USING INDIRECT SPECIFIERS | Jan 25, 1996 | Abandoned |
Array
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[id] => 3904888
[patent_doc_number] => 05778210
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be executed at the speculated time'
[patent_app_type] => 1
[patent_app_number] => 8/585361
[patent_app_country] => US
[patent_app_date] => 1996-01-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/585361 | Method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be executed at the speculated time | Jan 10, 1996 | Issued |
Array
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[id] => 3743732
[patent_doc_number] => 05666507
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[patent_kind] => NA
[patent_issue_date] => 1997-09-09
[patent_title] => 'Pipelined microinstruction apparatus and methods with branch prediction and speculative state changing'
[patent_app_type] => 1
[patent_app_number] => 8/578783
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[patent_app_date] => 1995-12-26
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Array
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[id] => 3750931
[patent_doc_number] => 05699537
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[patent_kind] => NA
[patent_issue_date] => 1997-12-16
[patent_title] => 'Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/577865 | Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions | Dec 21, 1995 | Issued |
| 08/575179 | DEADLOCK AVOIDANCE MECHANISM AND METHOD FOR MULTIPLE BUS TOPOLOGY | Dec 18, 1995 | Abandoned |
Array
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[id] => 3843961
[patent_doc_number] => 05712992
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-27
[patent_title] => 'State machine design for generating empty and full flags in an asynchronous FIFO'
[patent_app_type] => 1
[patent_app_number] => 8/567893
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[firstpage_image] =>[orig_patent_app_number] => 567893
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567893 | State machine design for generating empty and full flags in an asynchronous FIFO | Dec 5, 1995 | Issued |
Array
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[id] => 3861779
[patent_doc_number] => 05720035
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-17
[patent_title] => 'System for control of access to computer machines which are connected in a private network'
[patent_app_type] => 1
[patent_app_number] => 8/560963
[patent_app_country] => US
[patent_app_date] => 1995-11-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/560963 | System for control of access to computer machines which are connected in a private network | Nov 19, 1995 | Issued |
Array
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[id] => 3902473
[patent_doc_number] => 05724533
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[patent_issue_date] => 1998-03-03
[patent_title] => 'High performance instruction data path'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/558246 | High performance instruction data path | Nov 16, 1995 | Issued |
Array
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[id] => 3889927
[patent_doc_number] => 05729482
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Microprocessor shifter using rotation and masking operations'
[patent_app_type] => 1
[patent_app_number] => 8/550922
[patent_app_country] => US
[patent_app_date] => 1995-10-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/550922 | Microprocessor shifter using rotation and masking operations | Oct 30, 1995 | Issued |
| 08/549961 | SPECULATIVE REGISTER FILE FOR STORING SPECULATIVE REGISTER STATES AND REMOVING DEPENDENCIES BETWEEN INSTRUCTIONS UTILIZING THE REGISTER | Oct 29, 1995 | Abandoned |
Array
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[patent_kind] => NA
[patent_issue_date] => 1997-06-03
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Array
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Array
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Array
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Array
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[patent_kind] => NA
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[patent_title] => 'Unicode converter'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/527438 | Unicode converter | Sep 12, 1995 | Issued |