Search

William M. Treat

Examiner (ID: 16215)

Most Active Art Unit
2183
Art Unit(s)
2315, 2783, 2302, 2784, 2181, 2183
Total Applications
967
Issued Applications
755
Pending Applications
33
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4018076 [patent_doc_number] => 05860000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Floating point unit pipeline synchronized with processor pipeline' [patent_app_type] => 1 [patent_app_number] => 8/594763 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 36 [patent_no_of_words] => 15054 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860000.pdf [firstpage_image] =>[orig_patent_app_number] => 594763 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594763
Floating point unit pipeline synchronized with processor pipeline Jan 30, 1996 Issued
Array ( [id] => 3758467 [patent_doc_number] => 05754812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Out-of-order load/store execution control' [patent_app_type] => 1 [patent_app_number] => 8/592209 [patent_app_country] => US [patent_app_date] => 1996-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 17487 [patent_no_of_claims] => 83 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754812.pdf [firstpage_image] =>[orig_patent_app_number] => 592209 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/592209
Out-of-order load/store execution control Jan 25, 1996 Issued
08/593765 INSTRUCTION BUFFER ORGANIZATION METHOD AND SYSTEM Jan 25, 1996 Abandoned
Array ( [id] => 4024699 [patent_doc_number] => 06006277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Virtual software machine for enabling CICS application software to run on UNIX based computer systems' [patent_app_type] => 1 [patent_app_number] => 8/599514 [patent_app_country] => US [patent_app_date] => 1996-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4011 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/006/06006277.pdf [firstpage_image] =>[orig_patent_app_number] => 599514 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599514
Virtual software machine for enabling CICS application software to run on UNIX based computer systems Jan 25, 1996 Issued
08/592208 INSTRUCTION DECODER INCLUDING EMULATION USING INDIRECT SPECIFIERS Jan 25, 1996 Abandoned
Array ( [id] => 3904888 [patent_doc_number] => 05778210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be executed at the speculated time' [patent_app_type] => 1 [patent_app_number] => 8/585361 [patent_app_country] => US [patent_app_date] => 1996-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 11332 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778210.pdf [firstpage_image] =>[orig_patent_app_number] => 585361 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/585361
Method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be executed at the speculated time Jan 10, 1996 Issued
Array ( [id] => 3743732 [patent_doc_number] => 05666507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Pipelined microinstruction apparatus and methods with branch prediction and speculative state changing' [patent_app_type] => 1 [patent_app_number] => 8/578783 [patent_app_country] => US [patent_app_date] => 1995-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6307 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666507.pdf [firstpage_image] =>[orig_patent_app_number] => 578783 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/578783
Pipelined microinstruction apparatus and methods with branch prediction and speculative state changing Dec 25, 1995 Issued
Array ( [id] => 3750931 [patent_doc_number] => 05699537 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions' [patent_app_type] => 1 [patent_app_number] => 8/577865 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6853 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/699/05699537.pdf [firstpage_image] =>[orig_patent_app_number] => 577865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/577865
Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions Dec 21, 1995 Issued
08/575179 DEADLOCK AVOIDANCE MECHANISM AND METHOD FOR MULTIPLE BUS TOPOLOGY Dec 18, 1995 Abandoned
Array ( [id] => 3843961 [patent_doc_number] => 05712992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'State machine design for generating empty and full flags in an asynchronous FIFO' [patent_app_type] => 1 [patent_app_number] => 8/567893 [patent_app_country] => US [patent_app_date] => 1995-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712992.pdf [firstpage_image] =>[orig_patent_app_number] => 567893 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/567893
State machine design for generating empty and full flags in an asynchronous FIFO Dec 5, 1995 Issued
Array ( [id] => 3861779 [patent_doc_number] => 05720035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'System for control of access to computer machines which are connected in a private network' [patent_app_type] => 1 [patent_app_number] => 8/560963 [patent_app_country] => US [patent_app_date] => 1995-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6387 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 440 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/720/05720035.pdf [firstpage_image] =>[orig_patent_app_number] => 560963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/560963
System for control of access to computer machines which are connected in a private network Nov 19, 1995 Issued
Array ( [id] => 3902473 [patent_doc_number] => 05724533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'High performance instruction data path' [patent_app_type] => 1 [patent_app_number] => 8/558246 [patent_app_country] => US [patent_app_date] => 1995-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10305 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724533.pdf [firstpage_image] =>[orig_patent_app_number] => 558246 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/558246
High performance instruction data path Nov 16, 1995 Issued
Array ( [id] => 3889927 [patent_doc_number] => 05729482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Microprocessor shifter using rotation and masking operations' [patent_app_type] => 1 [patent_app_number] => 8/550922 [patent_app_country] => US [patent_app_date] => 1995-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1391 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729482.pdf [firstpage_image] =>[orig_patent_app_number] => 550922 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/550922
Microprocessor shifter using rotation and masking operations Oct 30, 1995 Issued
08/549961 SPECULATIVE REGISTER FILE FOR STORING SPECULATIVE REGISTER STATES AND REMOVING DEPENDENCIES BETWEEN INSTRUCTIONS UTILIZING THE REGISTER Oct 29, 1995 Abandoned
Array ( [id] => 3744233 [patent_doc_number] => 05636366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'System and method for preserving instruction state-atomicity for translated program' [patent_app_type] => 1 [patent_app_number] => 8/549889 [patent_app_country] => US [patent_app_date] => 1995-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8717 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 460 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636366.pdf [firstpage_image] =>[orig_patent_app_number] => 549889 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/549889
System and method for preserving instruction state-atomicity for translated program Oct 29, 1995 Issued
Array ( [id] => 3755962 [patent_doc_number] => 05787286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method and system for tabulation of execution performance' [patent_app_type] => 1 [patent_app_number] => 8/541363 [patent_app_country] => US [patent_app_date] => 1995-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2833 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787286.pdf [firstpage_image] =>[orig_patent_app_number] => 541363 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/541363
Method and system for tabulation of execution performance Oct 9, 1995 Issued
Array ( [id] => 3642068 [patent_doc_number] => 05687339 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Pre-reading and pre-decoding of instructions of a microprocessor within single cycle' [patent_app_type] => 1 [patent_app_number] => 8/528165 [patent_app_country] => US [patent_app_date] => 1995-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2410 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687339.pdf [firstpage_image] =>[orig_patent_app_number] => 528165 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/528165
Pre-reading and pre-decoding of instructions of a microprocessor within single cycle Sep 13, 1995 Issued
Array ( [id] => 3834080 [patent_doc_number] => 05784071 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Context-based code convertor' [patent_app_type] => 1 [patent_app_number] => 8/527837 [patent_app_country] => US [patent_app_date] => 1995-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 14197 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784071.pdf [firstpage_image] =>[orig_patent_app_number] => 527837 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/527837
Context-based code convertor Sep 12, 1995 Issued
Array ( [id] => 3834052 [patent_doc_number] => 05784069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Bidirectional code converter' [patent_app_type] => 1 [patent_app_number] => 8/527827 [patent_app_country] => US [patent_app_date] => 1995-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 14830 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784069.pdf [firstpage_image] =>[orig_patent_app_number] => 527827 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/527827
Bidirectional code converter Sep 12, 1995 Issued
Array ( [id] => 3869330 [patent_doc_number] => 05793381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Unicode converter' [patent_app_type] => 1 [patent_app_number] => 8/527438 [patent_app_country] => US [patent_app_date] => 1995-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 15186 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793381.pdf [firstpage_image] =>[orig_patent_app_number] => 527438 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/527438
Unicode converter Sep 12, 1995 Issued
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