William M. Treat

Array ( [id] => 3532929 [patent_doc_number] => 05490272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-06 [patent_title] => 'Method and apparatus for creating multithreaded time slices in a multitasking operating system' [patent_app_type] => 1 [patent_app_number] => 8/188504 [patent_app_country] => US [patent_app_date] => 1994-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3480 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/490/05490272.pdf [firstpage_image] =>[orig_patent_app_number] => 188504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3626313 [patent_doc_number] => 05511173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Programmable logic array and data processing unit using the same' [patent_app_type] => 1 [patent_app_number] => 8/177794 [patent_app_country] => US [patent_app_date] => 1994-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8889 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/511/05511173.pdf [firstpage_image] =>[orig_patent_app_number] => 177794 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3471909 [patent_doc_number] => 05442761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Method by which packet handler inserts data load instructions in instruction sequence fetched by instruction fetch unit' [patent_app_type] => 1 [patent_app_number] => 8/173478 [patent_app_country] => US [patent_app_date] => 1993-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3200 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442761.pdf [firstpage_image] =>[orig_patent_app_number] => 173478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3527158 [patent_doc_number] => 05487159 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-23 [patent_title] => 'System for processing shift, mask, and merge operations in one instruction' [patent_app_type] => 1 [patent_app_number] => 8/172526 [patent_app_country] => US [patent_app_date] => 1993-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4300 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/487/05487159.pdf [firstpage_image] =>[orig_patent_app_number] => 172526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3471894 [patent_doc_number] => 05442760 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Decoded instruction cache architecture with each instruction field in multiple-instruction cache line directly connected to specific functional unit' [patent_app_type] => 1 [patent_app_number] => 8/173136 [patent_app_country] => US [patent_app_date] => 1993-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5218 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442760.pdf [firstpage_image] =>[orig_patent_app_number] => 173136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3605954 [patent_doc_number] => 05522062 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-28 [patent_title] => 'Personal computer for accessing two types of extended memories having different memory capacities' [patent_app_type] => 1 [patent_app_number] => 8/166987 [patent_app_country] => US [patent_app_date] => 1993-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 14390 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 546 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/522/05522062.pdf [firstpage_image] =>[orig_patent_app_number] => 166987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3564088 [patent_doc_number] => 05572684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'IEEE 488 interface and message handling method' [patent_app_type] => 1 [patent_app_number] => 8/154867 [patent_app_country] => US [patent_app_date] => 1993-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 7357 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572684.pdf [firstpage_image] =>[orig_patent_app_number] => 154867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3639748 [patent_doc_number] => 05621890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-15 [patent_title] => 'Method and apparatus for transferring data between a host device and a plurality of portable computers' [patent_app_type] => 1 [patent_app_number] => 8/150393 [patent_app_country] => US [patent_app_date] => 1993-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 33 [patent_no_of_words] => 18271 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/621/05621890.pdf [firstpage_image] =>[orig_patent_app_number] => 150393 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3590262 [patent_doc_number] => 05491798 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-13 [patent_title] => 'Method for network call management' [patent_app_type] => 1 [patent_app_number] => 8/150675 [patent_app_country] => US [patent_app_date] => 1993-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4679 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/491/05491798.pdf [firstpage_image] =>[orig_patent_app_number] => 150675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3730804 [patent_doc_number] => 05617570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-01 [patent_title] => 'Server for executing client operation calls, having a dispatcher, worker tasks, dispatcher shared memory area and worker control block with a task memory for each worker task and dispatcher/worker task semaphore communication' [patent_app_type] => 1 [patent_app_number] => 8/143161 [patent_app_country] => US [patent_app_date] => 1993-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 14324 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/617/05617570.pdf [firstpage_image] =>[orig_patent_app_number] => 143161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3456689 [patent_doc_number] => 05388236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-07 [patent_title] => 'Digital signal processor with multiway branching based on parallel evaluation of N threshold values followed by sequential evaluation of M' [patent_app_type] => 1 [patent_app_number] => 8/140989 [patent_app_country] => US [patent_app_date] => 1993-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 57 [patent_no_of_words] => 18042 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/388/05388236.pdf [firstpage_image] =>[orig_patent_app_number] => 140989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3633616 [patent_doc_number] => 05689630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Information reproducing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/139779 [patent_app_country] => US [patent_app_date] => 1993-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5171 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689630.pdf [firstpage_image] =>[orig_patent_app_number] => 139779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3878897 [patent_doc_number] => 05794026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Microprocessor having expedited execution of condition dependent instructions' [patent_app_type] => 1 [patent_app_number] => 8/138660 [patent_app_country] => US [patent_app_date] => 1993-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 10935 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794026.pdf [firstpage_image] =>[orig_patent_app_number] => 138660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3521810 [patent_doc_number] => 05588139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Method and system for generating objects for a multi-person virtual world using data flow networks' [patent_app_type] => 1 [patent_app_number] => 8/133802 [patent_app_country] => US [patent_app_date] => 1993-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4166 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/588/05588139.pdf [firstpage_image] =>[orig_patent_app_number] => 133802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3621025 [patent_doc_number] => 05590286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Method and apparatus for the pipelining of data during direct memory accesses' [patent_app_type] => 1 [patent_app_number] => 8/131970 [patent_app_country] => US [patent_app_date] => 1993-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3778 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590286.pdf [firstpage_image] =>[orig_patent_app_number] => 131970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3537834 [patent_doc_number] => 05504916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'Digital signal processor with direct data transfer from external memory' [patent_app_type] => 1 [patent_app_number] => 8/128257 [patent_app_country] => US [patent_app_date] => 1993-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 58 [patent_no_of_words] => 18036 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 527 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504916.pdf [firstpage_image] =>[orig_patent_app_number] => 128257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3600645 [patent_doc_number] => 05553297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Industrial control apparatus' [patent_app_type] => 1 [patent_app_number] => 8/119322 [patent_app_country] => US [patent_app_date] => 1993-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 42 [patent_no_of_words] => 11141 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553297.pdf [firstpage_image] =>[orig_patent_app_number] => 119322 [rel_patent_id] =>[rel_patent_doc_number] =>)