William M. Treat

Array ( [id] => 3491289 [patent_doc_number] => 05457789 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-10 [patent_title] => 'Method and apparatus for performing memory protection operations in a single instruction multiple data system' [patent_app_type] => 1 [patent_app_number] => 8/020870 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6198 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/457/05457789.pdf [firstpage_image] =>[orig_patent_app_number] => 020870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3561481 [patent_doc_number] => 05546571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-13 [patent_title] => 'Method of recursively deriving and storing data in, and retrieving recursively-derived data from, a computer database system' [patent_app_type] => 1 [patent_app_number] => 8/018473 [patent_app_country] => US [patent_app_date] => 1993-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7770 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/546/05546571.pdf [firstpage_image] =>[orig_patent_app_number] => 018473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3636964 [patent_doc_number] => 05603030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Method and system for destruction of objects using multiple destructor functions in an object-oriented computer system' [patent_app_type] => 1 [patent_app_number] => 8/001533 [patent_app_country] => US [patent_app_date] => 1993-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9060 [patent_no_of_claims] => 83 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/603/05603030.pdf [firstpage_image] =>[orig_patent_app_number] => 001533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3430444 [patent_doc_number] => 05434980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-18 [patent_title] => 'Apparatus for communication between a device control unit having a parallel bus and a serial channel having a serial link' [patent_app_type] => 1 [patent_app_number] => 7/996370 [patent_app_country] => US [patent_app_date] => 1992-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 10090 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/434/05434980.pdf [firstpage_image] =>[orig_patent_app_number] => 996370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3612118 [patent_doc_number] => 05559972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Method and apparatus for supporting byte-mode devices and non-byte-mode devices on a bus' [patent_app_type] => 1 [patent_app_number] => 7/981930 [patent_app_country] => US [patent_app_date] => 1992-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2702 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559972.pdf [firstpage_image] =>[orig_patent_app_number] => 981930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3065256 [patent_doc_number] => 05325536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-28 [patent_title] => 'Linking microprocessor interrupts arranged by processing requirements into separate queues into one interrupt processing routine for execution as one routine' [patent_app_type] => 1 [patent_app_number] => 7/982101 [patent_app_country] => US [patent_app_date] => 1992-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1583 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/325/05325536.pdf [firstpage_image] =>[orig_patent_app_number] => 982101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3129020 [patent_doc_number] => 05410679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Method and apparatus for concurrently supporting multiple levels of keyboard display terminal functionality on a single physical input/output controller interface in an information handling system' [patent_app_type] => 1 [patent_app_number] => 7/974677 [patent_app_country] => US [patent_app_date] => 1992-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1756 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 488 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/410/05410679.pdf [firstpage_image] =>[orig_patent_app_number] => 974677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3458570 [patent_doc_number] => 05421018 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Data communication method and apparatus having improved control over a detachable terminal device' [patent_app_type] => 1 [patent_app_number] => 7/972737 [patent_app_country] => US [patent_app_date] => 1992-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2352 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/421/05421018.pdf [firstpage_image] =>[orig_patent_app_number] => 972737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3059001 [patent_doc_number] => 05335344 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Method for inserting new machine instructions into preexisting machine code to monitor preexisting machine access to memory' [patent_app_type] => 1 [patent_app_number] => 7/970315 [patent_app_country] => US [patent_app_date] => 1992-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7657 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/335/05335344.pdf [firstpage_image] =>[orig_patent_app_number] => 970315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3433400 [patent_doc_number] => 05390314 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-14 [patent_title] => 'Method and apparatus for developing scripts that access mainframe resources that can be executed on various computer systems having different interface languages without modification' [patent_app_type] => 1 [patent_app_number] => 7/958962 [patent_app_country] => US [patent_app_date] => 1992-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 7214 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/390/05390314.pdf [firstpage_image] =>[orig_patent_app_number] => 958962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3041957 [patent_doc_number] => 05317722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-31 [patent_title] => 'Dynamically adapting multiple versions on system commands to a single operating system' [patent_app_type] => 1 [patent_app_number] => 7/941999 [patent_app_country] => US [patent_app_date] => 1992-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 7050 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/317/05317722.pdf [firstpage_image] =>[orig_patent_app_number] => 941999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3612470 [patent_doc_number] => 05559995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Method and apparatus for creating a wireframe and polygon virtual world' [patent_app_type] => 1 [patent_app_number] => 7/939834 [patent_app_country] => US [patent_app_date] => 1992-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1896 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559995.pdf [firstpage_image] =>[orig_patent_app_number] => 939834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2888763 [patent_doc_number] => 05185870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'System to determine if modification of first macroinstruction to execute in fewer clock cycles' [patent_app_type] => 1 [patent_app_number] => 7/926132 [patent_app_country] => US [patent_app_date] => 1992-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3576 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185870.pdf [firstpage_image] =>[orig_patent_app_number] => 926132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2955599 [patent_doc_number] => 05224217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-29 [patent_title] => 'Computer system which uses a least-recently-used algorithm for manipulating data tags when performing cache replacement' [patent_app_type] => 1 [patent_app_number] => 7/924391 [patent_app_country] => US [patent_app_date] => 1992-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2642 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/224/05224217.pdf [firstpage_image] =>[orig_patent_app_number] => 924391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3471833 [patent_doc_number] => 05442756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Branch prediction and resolution apparatus for a superscalar computer processor' [patent_app_type] => 1 [patent_app_number] => 7/922855 [patent_app_country] => US [patent_app_date] => 1992-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9337 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442756.pdf [firstpage_image] =>[orig_patent_app_number] => 922855 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3472506 [patent_doc_number] => 05442799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Digital signal processor with high speed multiplier means for double data input' [patent_app_type] => 1 [patent_app_number] => 7/907233 [patent_app_country] => US [patent_app_date] => 1992-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 58 [patent_no_of_words] => 18043 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442799.pdf [firstpage_image] =>[orig_patent_app_number] => 907233 [rel_patent_id] =>[rel_patent_doc_number] =>)