
William M. Treat
Examiner (ID: 16215)
| Most Active Art Unit | 2183 |
| Art Unit(s) | 2315, 2783, 2302, 2784, 2181, 2183 |
| Total Applications | 967 |
| Issued Applications | 755 |
| Pending Applications | 33 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5114957
[patent_doc_number] => 20070198873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-23
[patent_title] => 'Method of Operation of a Microprocessor'
[patent_app_type] => utility
[patent_app_number] => 11/565874
[patent_app_country] => US
[patent_app_date] => 2006-12-01
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Array
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[patent_doc_number] => 07389408
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[patent_kind] => B1
[patent_issue_date] => 2008-06-17
[patent_title] => 'Microarchitecture for compact storage of embedded constants'
[patent_app_type] => utility
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/566206 | Microarchitecture for compact storage of embedded constants | Nov 30, 2006 | Issued |
Array
(
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[patent_doc_number] => 07523446
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[patent_kind] => B2
[patent_issue_date] => 2009-04-21
[patent_title] => 'User-space return probes'
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[patent_app_date] => 2006-11-30
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Array
(
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[patent_doc_number] => 07707388
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[patent_issue_date] => 2010-04-27
[patent_title] => 'Computer memory architecture for hybrid serial and parallel computing systems'
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[patent_app_number] => 11/606860
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[patent_app_date] => 2006-11-29
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Array
(
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[patent_issue_date] => 2008-10-28
[patent_title] => 'Methods and apparatus for recognizing a subroutine call'
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Array
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[patent_title] => 'Executing functions determined via a collection of operations from translated instructions'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/599544 | System with high power and low power processors and thread transfer | Nov 13, 2006 | Abandoned |
Array
(
[id] => 4905628
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[patent_issue_date] => 2008-05-15
[patent_title] => 'Critical section detection and prediction mechanism for hardware lock elision'
[patent_app_type] => utility
[patent_app_number] => 11/599009
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[patent_app_date] => 2006-11-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/599009 | Critical section detection and prediction mechanism for hardware lock elision | Nov 12, 2006 | Issued |
Array
(
[id] => 4498848
[patent_doc_number] => 07886135
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[patent_issue_date] => 2011-02-08
[patent_title] => 'Pipeline replay support for unaligned memory operations'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/594672 | Pipeline replay support for unaligned memory operations | Nov 6, 2006 | Issued |
Array
(
[id] => 7595784
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[patent_title] => 'Latency tolerant pipeline synchronization'
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Array
(
[id] => 5000897
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[patent_issue_date] => 2007-02-22
[patent_title] => 'Method and apparatus for precisely identifying effective addresses associated with hardware events'
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Array
(
[id] => 4917802
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Array
(
[id] => 237792
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Array
(
[id] => 4747319
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[patent_title] => 'DATA PREFETCHING IN A MICROPROCESSING ENVIRONMENT'
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Array
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Array
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