
William M. Treat
Examiner (ID: 16215)
| Most Active Art Unit | 2183 |
| Art Unit(s) | 2315, 2783, 2302, 2784, 2181, 2183 |
| Total Applications | 967 |
| Issued Applications | 755 |
| Pending Applications | 33 |
| Abandoned Applications | 179 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4798969
[patent_doc_number] => 20080010555
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'Method and Apparatus for Measuring the Cost of a Pipeline Event and for Displaying Images Which Permit the Visualization orf Said Cost'
[patent_app_type] => utility
[patent_app_number] => 11/424696
[patent_app_country] => US
[patent_app_date] => 2006-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7656
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20080010555.pdf
[firstpage_image] =>[orig_patent_app_number] => 11424696
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424696 | Method and Apparatus for Measuring the Cost of a Pipeline Event and for Displaying Images Which Permit the Visualization orf Said Cost | Jun 15, 2006 | Abandoned |
Array
(
[id] => 5523125
[patent_doc_number] => 20090031106
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-29
[patent_title] => 'RECONFIGURABLE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/915819
[patent_app_country] => US
[patent_app_date] => 2006-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 12915
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0031/20090031106.pdf
[firstpage_image] =>[orig_patent_app_number] => 11915819
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/915819 | Reconfigurable device | May 30, 2006 | Issued |
Array
(
[id] => 4551688
[patent_doc_number] => 07874009
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-18
[patent_title] => 'Data processing device'
[patent_app_type] => utility
[patent_app_number] => 11/914525
[patent_app_country] => US
[patent_app_date] => 2006-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 24
[patent_no_of_words] => 18991
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/874/07874009.pdf
[firstpage_image] =>[orig_patent_app_number] => 11914525
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/914525 | Data processing device | May 25, 2006 | Issued |
Array
(
[id] => 8775
[patent_doc_number] => 07818540
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-19
[patent_title] => 'Vector processing system'
[patent_app_type] => utility
[patent_app_number] => 11/437385
[patent_app_country] => US
[patent_app_date] => 2006-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4501
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/818/07818540.pdf
[firstpage_image] =>[orig_patent_app_number] => 11437385
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/437385 | Vector processing system | May 18, 2006 | Issued |
Array
(
[id] => 534597
[patent_doc_number] => 07194599
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-20
[patent_title] => 'Configurable co-processor interface'
[patent_app_type] => utility
[patent_app_number] => 11/380925
[patent_app_country] => US
[patent_app_date] => 2006-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 12249
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/194/07194599.pdf
[firstpage_image] =>[orig_patent_app_number] => 11380925
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/380925 | Configurable co-processor interface | Apr 28, 2006 | Issued |
Array
(
[id] => 5679421
[patent_doc_number] => 20060184777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-17
[patent_title] => 'Method, apparatus and computer program product for identifying sources of performance events'
[patent_app_type] => utility
[patent_app_number] => 11/405050
[patent_app_country] => US
[patent_app_date] => 2006-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4672
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20060184777.pdf
[firstpage_image] =>[orig_patent_app_number] => 11405050
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/405050 | Method, apparatus and computer program product for identifying sources of performance events | Apr 16, 2006 | Issued |
Array
(
[id] => 5650965
[patent_doc_number] => 20060136700
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Vector processing system'
[patent_app_type] => utility
[patent_app_number] => 11/324494
[patent_app_country] => US
[patent_app_date] => 2006-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4879
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20060136700.pdf
[firstpage_image] =>[orig_patent_app_number] => 11324494
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/324494 | Vector processing system | Jan 2, 2006 | Issued |
Array
(
[id] => 5650964
[patent_doc_number] => 20060136699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Apparatus and method for accessing registers in a processor'
[patent_app_type] => utility
[patent_app_number] => 11/314396
[patent_app_country] => US
[patent_app_date] => 2005-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5101
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20060136699.pdf
[firstpage_image] =>[orig_patent_app_number] => 11314396
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/314396 | Apparatus and method for accessing registers in a processor | Dec 19, 2005 | Abandoned |
Array
(
[id] => 4592884
[patent_doc_number] => 07853860
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-14
[patent_title] => 'Programmable signal and processing circuit and method of depuncturing'
[patent_app_type] => utility
[patent_app_number] => 11/721053
[patent_app_country] => US
[patent_app_date] => 2005-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 9293
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/853/07853860.pdf
[firstpage_image] =>[orig_patent_app_number] => 11721053
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/721053 | Programmable signal and processing circuit and method of depuncturing | Dec 12, 2005 | Issued |
Array
(
[id] => 5266807
[patent_doc_number] => 20090119492
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'Data Processing Apparatus and Method for Handling Procedure Call Instructions'
[patent_app_type] => utility
[patent_app_number] => 11/992056
[patent_app_country] => US
[patent_app_date] => 2005-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7594
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0119/20090119492.pdf
[firstpage_image] =>[orig_patent_app_number] => 11992056
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/992056 | Data Processing Apparatus and Method for Handling Procedure Call Instructions | Oct 25, 2005 | Abandoned |
Array
(
[id] => 4862140
[patent_doc_number] => 20080270747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'Method and Device for Switching Over Between Operating Modes of a Multi-Processor System Using at Least One External Signal'
[patent_app_type] => utility
[patent_app_number] => 11/666325
[patent_app_country] => US
[patent_app_date] => 2005-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3958
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0270/20080270747.pdf
[firstpage_image] =>[orig_patent_app_number] => 11666325
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/666325 | Method and Device for Switching Over Between Operating Modes of a Multi-Processor System Using at Least One External Signal | Oct 24, 2005 | Abandoned |
Array
(
[id] => 5867105
[patent_doc_number] => 20060101236
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-11
[patent_title] => 'Method and apparatus for increasing processing speed using quantum coprocessor'
[patent_app_type] => utility
[patent_app_number] => 11/247212
[patent_app_country] => US
[patent_app_date] => 2005-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4989
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20060101236.pdf
[firstpage_image] =>[orig_patent_app_number] => 11247212
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/247212 | Method and apparatus for increasing processing speed using quantum coprocessor | Oct 11, 2005 | Abandoned |
Array
(
[id] => 925051
[patent_doc_number] => 07320062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-15
[patent_title] => 'Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements'
[patent_app_type] => utility
[patent_app_number] => 11/241009
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 17370
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/320/07320062.pdf
[firstpage_image] =>[orig_patent_app_number] => 11241009
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/241009 | Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements | Sep 29, 2005 | Issued |
Array
(
[id] => 5770754
[patent_doc_number] => 20060020773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'System and method for register renaming'
[patent_app_type] => utility
[patent_app_number] => 11/235090
[patent_app_country] => US
[patent_app_date] => 2005-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4456
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20060020773.pdf
[firstpage_image] =>[orig_patent_app_number] => 11235090
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/235090 | System and method for register renaming | Sep 26, 2005 | Issued |
Array
(
[id] => 7746342
[patent_doc_number] => 08108658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Data processing circuit wherein functional units share read ports'
[patent_app_type] => utility
[patent_app_number] => 11/575501
[patent_app_country] => US
[patent_app_date] => 2005-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 5893
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/108/08108658.pdf
[firstpage_image] =>[orig_patent_app_number] => 11575501
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/575501 | Data processing circuit wherein functional units share read ports | Sep 20, 2005 | Issued |
Array
(
[id] => 6979541
[patent_doc_number] => 20050289259
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-29
[patent_title] => 'Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller'
[patent_app_type] => utility
[patent_app_number] => 11/207280
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6315
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0289/20050289259.pdf
[firstpage_image] =>[orig_patent_app_number] => 11207280
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/207280 | Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller | Aug 18, 2005 | Abandoned |
Array
(
[id] => 5447993
[patent_doc_number] => 20090049219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-19
[patent_title] => 'INFORMATION PROCESSING APPARATUS AND EXCEPTION CONTROL CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/658816
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5716
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20090049219.pdf
[firstpage_image] =>[orig_patent_app_number] => 11658816
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/658816 | Information processing apparatus and exception control circuit | Aug 18, 2005 | Issued |
Array
(
[id] => 223464
[patent_doc_number] => 07610475
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-27
[patent_title] => 'Programmable logic configuration for instruction extensions'
[patent_app_type] => utility
[patent_app_number] => 11/204555
[patent_app_country] => US
[patent_app_date] => 2005-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 7813
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/610/07610475.pdf
[firstpage_image] =>[orig_patent_app_number] => 11204555
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/204555 | Programmable logic configuration for instruction extensions | Aug 14, 2005 | Issued |
Array
(
[id] => 4556804
[patent_doc_number] => 07890733
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-15
[patent_title] => 'Processor memory system'
[patent_app_type] => utility
[patent_app_number] => 11/573556
[patent_app_country] => US
[patent_app_date] => 2005-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 6896
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/890/07890733.pdf
[firstpage_image] =>[orig_patent_app_number] => 11573556
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/573556 | Processor memory system | Aug 10, 2005 | Issued |
Array
(
[id] => 226814
[patent_doc_number] => 07606996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-20
[patent_title] => 'Array type operation device'
[patent_app_type] => utility
[patent_app_number] => 11/572701
[patent_app_country] => US
[patent_app_date] => 2005-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 35
[patent_no_of_words] => 13583
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/606/07606996.pdf
[firstpage_image] =>[orig_patent_app_number] => 11572701
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/572701 | Array type operation device | Aug 1, 2005 | Issued |