Search

William N. Harris

Examiner (ID: 17068, Phone: (571)272-3609 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875, 2885
Total Applications
947
Issued Applications
693
Pending Applications
53
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2725641 [patent_doc_number] => 05008807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-16 [patent_title] => 'Data processing apparatus with abbreviated jump field' [patent_app_type] => 1 [patent_app_number] => 7/517979 [patent_app_country] => US [patent_app_date] => 1990-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7771 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/008/05008807.pdf [firstpage_image] =>[orig_patent_app_number] => 517979 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/517979
Data processing apparatus with abbreviated jump field Apr 26, 1990 Issued
07/514986 CENTRALIZED MONITORING OF ACTIVITY IN A DISTRIBUTED PROCESSING SYSTEM Apr 25, 1990 Abandoned
Array ( [id] => 2976500 [patent_doc_number] => 05274765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Multifunctional coupler for connecting a central processing unit of a computer to one or more peripheral devices' [patent_app_type] => 1 [patent_app_number] => 7/510275 [patent_app_country] => US [patent_app_date] => 1990-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5013 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274765.pdf [firstpage_image] =>[orig_patent_app_number] => 510275 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/510275
Multifunctional coupler for connecting a central processing unit of a computer to one or more peripheral devices Apr 16, 1990 Issued
Array ( [id] => 3059019 [patent_doc_number] => 05335345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Dynamic query optimization using partial information' [patent_app_type] => 1 [patent_app_number] => 7/508265 [patent_app_country] => US [patent_app_date] => 1990-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 7828 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/335/05335345.pdf [firstpage_image] =>[orig_patent_app_number] => 508265 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/508265
Dynamic query optimization using partial information Apr 10, 1990 Issued
07/504766 CONCURRENCY MANAGEMENT USING VERSION IDENTIFICATION OF SHARED DATA AS A SUPPLEMENT TO USE OF LOCKS Apr 3, 1990 Abandoned
Array ( [id] => 3110318 [patent_doc_number] => 05293594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'Data processing system having a plurality of register groups and a logical or circuit for addressing one register of one of the register groups' [patent_app_type] => 1 [patent_app_number] => 7/503626 [patent_app_country] => US [patent_app_date] => 1990-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5467 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293594.pdf [firstpage_image] =>[orig_patent_app_number] => 503626 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/503626
Data processing system having a plurality of register groups and a logical or circuit for addressing one register of one of the register groups Apr 2, 1990 Issued
07/496448 DATA PROCESSOR HAVING TWO INSTRUCTION REGISTERS CONNECTED IN CASCADE AND TWO INSTRUCTION DECODERS Mar 19, 1990 Abandoned
Array ( [id] => 3032843 [patent_doc_number] => 05303368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Dead lock preventing method for data base system' [patent_app_type] => 1 [patent_app_number] => 7/486352 [patent_app_country] => US [patent_app_date] => 1990-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7487 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303368.pdf [firstpage_image] =>[orig_patent_app_number] => 486352 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/486352
Dead lock preventing method for data base system Feb 27, 1990 Issued
07/477266 CONTROL PROCESS FOR ALLOCATING SERVICE IN COMMUNICATIONS SYSTEMS Feb 7, 1990 Abandoned
Array ( [id] => 2980508 [patent_doc_number] => 05202994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-13 [patent_title] => 'System and method for shadowing and re-mapping reserved memory in a microcomputer' [patent_app_type] => 1 [patent_app_number] => 7/472057 [patent_app_country] => US [patent_app_date] => 1990-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6203 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/202/05202994.pdf [firstpage_image] =>[orig_patent_app_number] => 472057 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/472057
System and method for shadowing and re-mapping reserved memory in a microcomputer Jan 30, 1990 Issued
Array ( [id] => 2715844 [patent_doc_number] => 05014189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Processor array comprising processors connected selectively in series or in parallel' [patent_app_type] => 1 [patent_app_number] => 7/465529 [patent_app_country] => US [patent_app_date] => 1990-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 5644 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014189.pdf [firstpage_image] =>[orig_patent_app_number] => 465529 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/465529
Processor array comprising processors connected selectively in series or in parallel Jan 16, 1990 Issued
07/461775 METHOD AND SYSTEM FOR CUSTOMIZING A USER INTERFACE IN A COMPUTER SYSTEM Jan 7, 1990 Abandoned
07/455466 NAME RESOLUTION IN A DIRECTORY DATABASE Dec 21, 1989 Abandoned
Array ( [id] => 2892889 [patent_doc_number] => 05109513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Interrupt control circuit for multi-master bus' [patent_app_type] => 1 [patent_app_number] => 7/457795 [patent_app_country] => US [patent_app_date] => 1989-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3456 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109513.pdf [firstpage_image] =>[orig_patent_app_number] => 457795 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/457795
Interrupt control circuit for multi-master bus Dec 17, 1989 Issued
07/450298 OPERATING SYSTEM AND DATA BASE USING TABLE ACCESS METHOD WITH HETEROGENEOUS DATA STORES Dec 12, 1989 Abandoned
07/443617 TABLE-MODIFIABLE EDIT FUNCTION WITH ORDER-EFFECTIVE EDIT RULES Nov 29, 1989 Abandoned
Array ( [id] => 2950823 [patent_doc_number] => 05261042 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Menu management system' [patent_app_type] => 1 [patent_app_number] => 7/440419 [patent_app_country] => US [patent_app_date] => 1989-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5475 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261042.pdf [firstpage_image] =>[orig_patent_app_number] => 440419 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/440419
Menu management system Nov 19, 1989 Issued
07/434153 DATA BASE ACCESS SYSTEM Nov 12, 1989 Abandoned
07/431653 METHOD AND APPARATUS FOR INDEPENDENTLY RESETTING PROCESSORS AND CACHE CONTROLLERS IN MULTIPLE PROCESSOR SYSTEMS Nov 2, 1989 Abandoned
07/426902 SHARED MEMORY ARBITRATION SYSTEM Oct 24, 1989 Abandoned
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