William P Neuder
Examiner (ID: 14991)
Most Active Art Unit | 3672 |
Art Unit(s) | 3625, 3642, 3672, 2899, 3506 |
Total Applications | 4583 |
Issued Applications | 4085 |
Pending Applications | 166 |
Abandoned Applications | 332 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 1248866
[patent_doc_number] => 06678805
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-13
[patent_title] => 'Structure organization for improved cache performance'
[patent_app_type] => B1
[patent_app_number] => 09/578774
[patent_app_country] => US
[patent_app_date] => 2000-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8666
[patent_no_of_claims] => 87
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/678/06678805.pdf
[firstpage_image] =>[orig_patent_app_number] => 09578774
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/578774 | Structure organization for improved cache performance | May 24, 2000 | Issued |
Array
(
[id] => 7623831
[patent_doc_number] => 06725346
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'Method and apparatus for overlaying memory in a data processing system'
[patent_app_type] => B1
[patent_app_number] => 09/542747
[patent_app_country] => US
[patent_app_date] => 2000-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3570
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 8
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/725/06725346.pdf
[firstpage_image] =>[orig_patent_app_number] => 09542747
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/542747 | Method and apparatus for overlaying memory in a data processing system | Apr 3, 2000 | Issued |
Array
(
[id] => 1143606
[patent_doc_number] => 06785786
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-31
[patent_title] => 'Data backup and recovery systems'
[patent_app_type] => B1
[patent_app_number] => 09/486439
[patent_app_country] => US
[patent_app_date] => 2000-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 10475
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/785/06785786.pdf
[firstpage_image] =>[orig_patent_app_number] => 09486439
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/486439 | Data backup and recovery systems | Feb 27, 2000 | Issued |
Array
(
[id] => 7633085
[patent_doc_number] => 06658535
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Non-interfering seek behavior modification for improved hard drive performance'
[patent_app_type] => B1
[patent_app_number] => 09/487206
[patent_app_country] => US
[patent_app_date] => 2000-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3099
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 12
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/658/06658535.pdf
[firstpage_image] =>[orig_patent_app_number] => 09487206
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/487206 | Non-interfering seek behavior modification for improved hard drive performance | Jan 18, 2000 | Issued |
Array
(
[id] => 1484939
[patent_doc_number] => 06453380
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-17
[patent_title] => 'Address mapping for configurable memory system'
[patent_app_type] => B1
[patent_app_number] => 09/484746
[patent_app_country] => US
[patent_app_date] => 2000-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 5421
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/453/06453380.pdf
[firstpage_image] =>[orig_patent_app_number] => 09484746
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/484746 | Address mapping for configurable memory system | Jan 17, 2000 | Issued |
Array
(
[id] => 1075159
[patent_doc_number] => 06839827
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-01-04
[patent_title] => 'Method, system, program, and data structures for mapping logical blocks to physical blocks'
[patent_app_type] => utility
[patent_app_number] => 09/484574
[patent_app_country] => US
[patent_app_date] => 2000-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6136
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 15
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/839/06839827.pdf
[firstpage_image] =>[orig_patent_app_number] => 09484574
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/484574 | Method, system, program, and data structures for mapping logical blocks to physical blocks | Jan 17, 2000 | Issued |
Array
(
[id] => 1271873
[patent_doc_number] => 06662280
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-09
[patent_title] => 'Store buffer which forwards data based on index and optional way match'
[patent_app_type] => B1
[patent_app_number] => 09/482399
[patent_app_country] => US
[patent_app_date] => 2000-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 19874
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/662/06662280.pdf
[firstpage_image] =>[orig_patent_app_number] => 09482399
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/482399 | Store buffer which forwards data based on index and optional way match | Jan 11, 2000 | Issued |
Array
(
[id] => 1058952
[patent_doc_number] => 06857042
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-02-15
[patent_title] => 'Method for refreshing a dynamic memory'
[patent_app_type] => utility
[patent_app_number] => 09/481784
[patent_app_country] => US
[patent_app_date] => 2000-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5675
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/857/06857042.pdf
[firstpage_image] =>[orig_patent_app_number] => 09481784
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/481784 | Method for refreshing a dynamic memory | Jan 10, 2000 | Issued |
Array
(
[id] => 1365402
[patent_doc_number] => 06581147
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-17
[patent_title] => 'Data flow control circuitry including buffer circuitry that stores data access requests and data'
[patent_app_type] => B1
[patent_app_number] => 09/481098
[patent_app_country] => US
[patent_app_date] => 2000-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6788
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/581/06581147.pdf
[firstpage_image] =>[orig_patent_app_number] => 09481098
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/481098 | Data flow control circuitry including buffer circuitry that stores data access requests and data | Jan 10, 2000 | Issued |
Array
(
[id] => 7613866
[patent_doc_number] => 06898665
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-05-24
[patent_title] => 'System and method for profiling access to disk drive commands based on a dual servo mode model'
[patent_app_type] => utility
[patent_app_number] => 09/481233
[patent_app_country] => US
[patent_app_date] => 2000-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6568
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/898/06898665.pdf
[firstpage_image] =>[orig_patent_app_number] => 09481233
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/481233 | System and method for profiling access to disk drive commands based on a dual servo mode model | Jan 10, 2000 | Issued |
Array
(
[id] => 1325226
[patent_doc_number] => 06615324
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-02
[patent_title] => 'Embedded microprocessor multi-level security system in flash memory'
[patent_app_type] => B1
[patent_app_number] => 09/479551
[patent_app_country] => US
[patent_app_date] => 2000-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 5659
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/615/06615324.pdf
[firstpage_image] =>[orig_patent_app_number] => 09479551
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/479551 | Embedded microprocessor multi-level security system in flash memory | Jan 6, 2000 | Issued |
Array
(
[id] => 1258332
[patent_doc_number] => 06671766
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-30
[patent_title] => 'Method and system for implementing memory efficient track aging'
[patent_app_type] => B1
[patent_app_number] => 09/479539
[patent_app_country] => US
[patent_app_date] => 2000-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 7053
[patent_no_of_claims] => 50
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/671/06671766.pdf
[firstpage_image] =>[orig_patent_app_number] => 09479539
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/479539 | Method and system for implementing memory efficient track aging | Jan 6, 2000 | Issued |
Array
(
[id] => 1092838
[patent_doc_number] => 06829680
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-07
[patent_title] => 'Method for employing a page prefetch cache for database applications'
[patent_app_type] => B1
[patent_app_number] => 09/477867
[patent_app_country] => US
[patent_app_date] => 2000-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2992
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/829/06829680.pdf
[firstpage_image] =>[orig_patent_app_number] => 09477867
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/477867 | Method for employing a page prefetch cache for database applications | Jan 4, 2000 | Issued |
Array
(
[id] => 1068320
[patent_doc_number] => 06848028
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-01-25
[patent_title] => 'Microprocessor having a page prefetch cache for database applications'
[patent_app_type] => utility
[patent_app_number] => 09/477868
[patent_app_country] => US
[patent_app_date] => 2000-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2996
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/848/06848028.pdf
[firstpage_image] =>[orig_patent_app_number] => 09477868
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/477868 | Microprocessor having a page prefetch cache for database applications | Jan 4, 2000 | Issued |
Array
(
[id] => 7622377
[patent_doc_number] => 06687789
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-03
[patent_title] => 'Cache which provides partial tags from non-predicted ways to direct search if way prediction misses'
[patent_app_type] => B1
[patent_app_number] => 09/476577
[patent_app_country] => US
[patent_app_date] => 2000-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 13454
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/687/06687789.pdf
[firstpage_image] =>[orig_patent_app_number] => 09476577
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/476577 | Cache which provides partial tags from non-predicted ways to direct search if way prediction misses | Jan 2, 2000 | Issued |
Array
(
[id] => 7622366
[patent_doc_number] => 06687800
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-03
[patent_title] => 'Chip card comprising means and method for managing a virtual memory and associated communication method'
[patent_app_type] => B1
[patent_app_number] => 09/446003
[patent_app_country] => US
[patent_app_date] => 1999-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 12449
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/687/06687800.pdf
[firstpage_image] =>[orig_patent_app_number] => 09446003
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/446003 | Chip card comprising means and method for managing a virtual memory and associated communication method | Dec 14, 1999 | Issued |
Array
(
[id] => 7962235
[patent_doc_number] => 06681312
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-20
[patent_title] => 'Power saving address translation buffer'
[patent_app_type] => B1
[patent_app_number] => 09/451104
[patent_app_country] => US
[patent_app_date] => 1999-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3561
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/681/06681312.pdf
[firstpage_image] =>[orig_patent_app_number] => 09451104
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/451104 | Power saving address translation buffer | Nov 29, 1999 | Issued |
Array
(
[id] => 1200979
[patent_doc_number] => 06728843
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-27
[patent_title] => 'System and method for tracking and processing parallel coherent memory accesses'
[patent_app_type] => B1
[patent_app_number] => 09/451499
[patent_app_country] => US
[patent_app_date] => 1999-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2992
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/728/06728843.pdf
[firstpage_image] =>[orig_patent_app_number] => 09451499
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/451499 | System and method for tracking and processing parallel coherent memory accesses | Nov 29, 1999 | Issued |
Array
(
[id] => 1186675
[patent_doc_number] => 06738882
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-05-18
[patent_title] => 'Concurrent multi-processor memory testing beyond 32-bit addresses'
[patent_app_type] => B1
[patent_app_number] => 09/451052
[patent_app_country] => US
[patent_app_date] => 1999-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3544
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/738/06738882.pdf
[firstpage_image] =>[orig_patent_app_number] => 09451052
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/451052 | Concurrent multi-processor memory testing beyond 32-bit addresses | Nov 29, 1999 | Issued |
Array
(
[id] => 1308733
[patent_doc_number] => 06629202
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-30
[patent_title] => 'Volume stacking model'
[patent_app_type] => B1
[patent_app_number] => 09/451219
[patent_app_country] => US
[patent_app_date] => 1999-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6284
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/629/06629202.pdf
[firstpage_image] =>[orig_patent_app_number] => 09451219
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/451219 | Volume stacking model | Nov 28, 1999 | Issued |