William P Neuder
Examiner (ID: 14991)
Most Active Art Unit | 3672 |
Art Unit(s) | 3625, 3642, 3672, 2899, 3506 |
Total Applications | 4583 |
Issued Applications | 4085 |
Pending Applications | 166 |
Abandoned Applications | 332 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 1284542
[patent_doc_number] => 06651144
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-18
[patent_title] => 'Method and apparatus for developing multiprocessor cache control protocols using an external acknowledgement signal to set a cache to a dirty state'
[patent_app_type] => B1
[patent_app_number] => 09/099384
[patent_app_country] => US
[patent_app_date] => 1998-06-18
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/651/06651144.pdf
[firstpage_image] =>[orig_patent_app_number] => 09099384
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/099384 | Method and apparatus for developing multiprocessor cache control protocols using an external acknowledgement signal to set a cache to a dirty state | Jun 17, 1998 | Issued |
Array
(
[id] => 6922157
[patent_doc_number] => 20010029574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-10-11
[patent_title] => 'METHOD AND APPARATUS FOR DEVELOPING MULTIPROCESSORE CACHE CONTROL PROTOCOLS USING A MEMORY MANAGEMENT SYSTEM GENERATING AN EXTERNAL ACKNOWLEDGEMENT SIGNAL TO SET A CACHE TO A DIRTY COHERENCE STATE'
[patent_app_type] => new
[patent_app_number] => 09/099386
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[pdf_file] => publications/A1/0029/20010029574.pdf
[firstpage_image] =>[orig_patent_app_number] => 09099386
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/099386 | METHOD AND APPARATUS FOR DEVELOPING MULTIPROCESSORE CACHE CONTROL PROTOCOLS USING A MEMORY MANAGEMENT SYSTEM GENERATING AN EXTERNAL ACKNOWLEDGEMENT SIGNAL TO SET A CACHE TO A DIRTY COHERENCE STATE | Jun 17, 1998 | Abandoned |
Array
(
[id] => 4351869
[patent_doc_number] => 06314496
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-06
[patent_title] => 'Method and apparatus for developing multiprocessor cache control protocols using atomic probe commands and system data control response commands'
[patent_app_type] => 1
[patent_app_number] => 9/099398
[patent_app_country] => US
[patent_app_date] => 1998-06-18
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Array
(
[id] => 7118679
[patent_doc_number] => 20010001872
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-05-24
[patent_title] => 'DATA CACHING WITH A PARTIALLY COMPRESSED CACHE'
[patent_app_type] => new-utility
[patent_app_number] => 09/090028
[patent_app_country] => US
[patent_app_date] => 1998-06-10
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[firstpage_image] =>[orig_patent_app_number] => 09090028
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/090028 | Data caching with a partially compressed cache | Jun 9, 1998 | Issued |
Array
(
[id] => 4292370
[patent_doc_number] => 06247108
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[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Memory management during processing of binary decision diagrams in a computer system'
[patent_app_type] => 1
[patent_app_number] => 9/089835
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[patent_app_date] => 1998-06-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/089835 | Memory management during processing of binary decision diagrams in a computer system | Jun 2, 1998 | Issued |
Array
(
[id] => 4176746
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[patent_title] => 'Dynamic bus arbitration priority and task switching based on shared memory fullness in a multi-processor system'
[patent_app_type] => 1
[patent_app_number] => 9/089721
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[firstpage_image] =>[orig_patent_app_number] => 089721
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/089721 | Dynamic bus arbitration priority and task switching based on shared memory fullness in a multi-processor system | Jun 2, 1998 | Issued |
Array
(
[id] => 4366305
[patent_doc_number] => 06286090
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[patent_issue_date] => 2001-09-04
[patent_title] => 'Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetches'
[patent_app_type] => 1
[patent_app_number] => 9/084621
[patent_app_country] => US
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[pdf_file] => patents/06/286/06286090.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/084621 | Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetches | May 25, 1998 | Issued |
Array
(
[id] => 4270101
[patent_doc_number] => 06223252
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'Hot spare light weight mirror for raid system'
[patent_app_type] => 1
[patent_app_number] => 9/072259
[patent_app_country] => US
[patent_app_date] => 1998-05-04
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[firstpage_image] =>[orig_patent_app_number] => 072259
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/072259 | Hot spare light weight mirror for raid system | May 3, 1998 | Issued |
Array
(
[id] => 1214427
[patent_doc_number] => 06715056
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[patent_issue_date] => 2004-03-30
[patent_title] => 'Network document transmission to receiving display stations with automatic sizing of received document caches based upon user activity in prior browsing sessions'
[patent_app_type] => B1
[patent_app_number] => 09/070039
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[pdf_file] => patents/06/715/06715056.pdf
[firstpage_image] =>[orig_patent_app_number] => 09070039
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/070039 | Network document transmission to receiving display stations with automatic sizing of received document caches based upon user activity in prior browsing sessions | Apr 29, 1998 | Issued |
Array
(
[id] => 4325409
[patent_doc_number] => 06253288
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[patent_issue_date] => 2001-06-26
[patent_title] => 'Hybrid cache/SIRO buffer system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/070190 | Hybrid cache/SIRO buffer system | Apr 29, 1998 | Issued |
Array
(
[id] => 4260325
[patent_doc_number] => 06167494
[patent_country] => US
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[patent_issue_date] => 2000-12-26
[patent_title] => 'Method and system for recovering from operating system failure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/067630 | Method and system for recovering from operating system failure | Apr 27, 1998 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/060886 | Alias-free content-indexed object cache | Apr 14, 1998 | Issued |
Array
(
[id] => 1567451
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Array
(
[id] => 6780013
[patent_doc_number] => 20030051095
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[patent_title] => 'METHOD AND DEVICE FOR OBTAINING AN ADAPTIVE SELECTION OF SETS OF DATA STORED IN A MASS MEMORY'
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Array
(
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Array
(
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Array
(
[id] => 4317846
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/027577 | Apparatus and method for data processing employing data blocks and updating blocks | Feb 22, 1998 | Issued |
Array
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