William P Neuder
Examiner (ID: 14991)
Most Active Art Unit | 3672 |
Art Unit(s) | 3625, 3642, 3672, 2899, 3506 |
Total Applications | 4583 |
Issued Applications | 4085 |
Pending Applications | 166 |
Abandoned Applications | 332 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6335921
[patent_doc_number] => 20020199078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-26
[patent_title] => 'Method for computing a fast fourier transform and associated circuit for addressing a data memory'
[patent_app_type] => new
[patent_app_number] => 10/198896
[patent_app_country] => US
[patent_app_date] => 2002-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6649
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0199/20020199078.pdf
[firstpage_image] =>[orig_patent_app_number] => 10198896
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/198896 | Method for computing a fast fourier transform and associated circuit for addressing a data memory | Jul 17, 2002 | Abandoned |
Array
(
[id] => 1337166
[patent_doc_number] => 06604180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-08-05
[patent_title] => 'Pipelined memory controller'
[patent_app_type] => B2
[patent_app_number] => 10/195779
[patent_app_country] => US
[patent_app_date] => 2002-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4116
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/604/06604180.pdf
[firstpage_image] =>[orig_patent_app_number] => 10195779
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/195779 | Pipelined memory controller | Jul 10, 2002 | Issued |
Array
(
[id] => 706749
[patent_doc_number] => 07065626
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-06-20
[patent_title] => 'Method for changing computer system memory density'
[patent_app_type] => utility
[patent_app_number] => 10/193774
[patent_app_country] => US
[patent_app_date] => 2002-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2704
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/065/07065626.pdf
[firstpage_image] =>[orig_patent_app_number] => 10193774
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/193774 | Method for changing computer system memory density | Jul 9, 2002 | Issued |
Array
(
[id] => 1376944
[patent_doc_number] => 06578114
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-10
[patent_title] => 'Method and apparatus for altering data length to zero to maintain cache coherency'
[patent_app_type] => B2
[patent_app_number] => 10/180009
[patent_app_country] => US
[patent_app_date] => 2002-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3134
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/578/06578114.pdf
[firstpage_image] =>[orig_patent_app_number] => 10180009
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/180009 | Method and apparatus for altering data length to zero to maintain cache coherency | Jun 25, 2002 | Issued |
Array
(
[id] => 1043157
[patent_doc_number] => 06871258
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-22
[patent_title] => 'METHOD FOR ERASING AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE, AND AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 10/159780
[patent_app_country] => US
[patent_app_date] => 2002-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6297
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/871/06871258.pdf
[firstpage_image] =>[orig_patent_app_number] => 10159780
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/159780 | METHOD FOR ERASING AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE, AND AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE | May 29, 2002 | Issued |
Array
(
[id] => 1381689
[patent_doc_number] => 06574715
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-03
[patent_title] => 'Method and apparatus for managing internal caches and external caches in a data processing system'
[patent_app_type] => B2
[patent_app_number] => 10/157672
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 12862
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/574/06574715.pdf
[firstpage_image] =>[orig_patent_app_number] => 10157672
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/157672 | Method and apparatus for managing internal caches and external caches in a data processing system | May 28, 2002 | Issued |
Array
(
[id] => 6780026
[patent_doc_number] => 20030051108
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-13
[patent_title] => 'Method and apparatus for load distribution across memory banks with constrained access'
[patent_app_type] => new
[patent_app_number] => 10/156152
[patent_app_country] => US
[patent_app_date] => 2002-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6307
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0051/20030051108.pdf
[firstpage_image] =>[orig_patent_app_number] => 10156152
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/156152 | Method and apparatus for load distribution across memory banks with constrained access | May 27, 2002 | Issued |
Array
(
[id] => 1007685
[patent_doc_number] => 06907496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-14
[patent_title] => 'Method and apparatus for auto-detection of a configuration of a flash memory'
[patent_app_type] => utility
[patent_app_number] => 10/138901
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3049
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/907/06907496.pdf
[firstpage_image] =>[orig_patent_app_number] => 10138901
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138901 | Method and apparatus for auto-detection of a configuration of a flash memory | May 1, 2002 | Issued |
Array
(
[id] => 987717
[patent_doc_number] => 06925540
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-02
[patent_title] => 'Systems and methods for chassis identification'
[patent_app_type] => utility
[patent_app_number] => 10/138971
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2570
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/925/06925540.pdf
[firstpage_image] =>[orig_patent_app_number] => 10138971
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138971 | Systems and methods for chassis identification | May 1, 2002 | Issued |
Array
(
[id] => 7628184
[patent_doc_number] => 06820176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-16
[patent_title] => 'System, method, and computer program product for reducing overhead associated with software lock monitoring'
[patent_app_type] => B2
[patent_app_number] => 10/138900
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 4132
[patent_no_of_claims] => 60
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/820/06820176.pdf
[firstpage_image] =>[orig_patent_app_number] => 10138900
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138900 | System, method, and computer program product for reducing overhead associated with software lock monitoring | May 1, 2002 | Issued |
Array
(
[id] => 6561065
[patent_doc_number] => 20020138694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Magnetic disc drive, method for recording data, and method for reproducing data'
[patent_app_type] => new
[patent_app_number] => 10/018984
[patent_app_country] => US
[patent_app_date] => 2002-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9187
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20020138694.pdf
[firstpage_image] =>[orig_patent_app_number] => 10018984
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/018984 | Magnetic disc drive, method for recording data, and method for reproducing data | Apr 16, 2002 | Abandoned |
Array
(
[id] => 1385956
[patent_doc_number] => 06571323
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-05-27
[patent_title] => 'Memory-access management method and system for synchronous dynamic Random-Access memory or the like'
[patent_app_type] => B2
[patent_app_number] => 10/115780
[patent_app_country] => US
[patent_app_date] => 2002-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 20
[patent_no_of_words] => 7264
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/571/06571323.pdf
[firstpage_image] =>[orig_patent_app_number] => 10115780
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/115780 | Memory-access management method and system for synchronous dynamic Random-Access memory or the like | Apr 2, 2002 | Issued |
Array
(
[id] => 5848374
[patent_doc_number] => 20020133671
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-19
[patent_title] => 'Storage subsystem with management site changing function'
[patent_app_type] => new
[patent_app_number] => 10/106454
[patent_app_country] => US
[patent_app_date] => 2002-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7600
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0133/20020133671.pdf
[firstpage_image] =>[orig_patent_app_number] => 10106454
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/106454 | Storage subsystem with management site changing function | Mar 26, 2002 | Issued |
Array
(
[id] => 6309033
[patent_doc_number] => 20020095224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-18
[patent_title] => 'Host cache for haptic feedback effects'
[patent_app_type] => new
[patent_app_number] => 10/060472
[patent_app_country] => US
[patent_app_date] => 2002-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 19760
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0095/20020095224.pdf
[firstpage_image] =>[orig_patent_app_number] => 10060472
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/060472 | Host cache for haptic feedback effects | Jan 28, 2002 | Issued |
Array
(
[id] => 1260428
[patent_doc_number] => 06668303
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-23
[patent_title] => 'Method for refreshing stored data in an electrically erasable and programmable non-volatile memory'
[patent_app_type] => B2
[patent_app_number] => 10/057768
[patent_app_country] => US
[patent_app_date] => 2002-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 8182
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/668/06668303.pdf
[firstpage_image] =>[orig_patent_app_number] => 10057768
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/057768 | Method for refreshing stored data in an electrically erasable and programmable non-volatile memory | Jan 23, 2002 | Issued |
Array
(
[id] => 1381473
[patent_doc_number] => 06574703
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-03
[patent_title] => 'Initializing selected extents of a storage device'
[patent_app_type] => B1
[patent_app_number] => 10/056401
[patent_app_country] => US
[patent_app_date] => 2002-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 4119
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/574/06574703.pdf
[firstpage_image] =>[orig_patent_app_number] => 10056401
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/056401 | Initializing selected extents of a storage device | Jan 23, 2002 | Issued |
Array
(
[id] => 5937810
[patent_doc_number] => 20020062418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-23
[patent_title] => 'Partition of on-chip memory buffer for cache'
[patent_app_type] => new
[patent_app_number] => 10/055408
[patent_app_country] => US
[patent_app_date] => 2002-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5607
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 315
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20020062418.pdf
[firstpage_image] =>[orig_patent_app_number] => 10055408
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/055408 | Partition of on-chip memory buffer for cache | Jan 22, 2002 | Issued |
Array
(
[id] => 1243147
[patent_doc_number] => 06684315
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-27
[patent_title] => 'Method and system for supporting multiprocessor TLB-purge instructions using directed write transactions'
[patent_app_type] => B2
[patent_app_number] => 10/051154
[patent_app_country] => US
[patent_app_date] => 2002-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 3423
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 248
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/684/06684315.pdf
[firstpage_image] =>[orig_patent_app_number] => 10051154
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/051154 | Method and system for supporting multiprocessor TLB-purge instructions using directed write transactions | Jan 21, 2002 | Issued |
Array
(
[id] => 5830432
[patent_doc_number] => 20020069316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-06-06
[patent_title] => 'Method and apparatus for protecting flash memory'
[patent_app_type] => new
[patent_app_number] => 10/038154
[patent_app_country] => US
[patent_app_date] => 2002-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5875
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20020069316.pdf
[firstpage_image] =>[orig_patent_app_number] => 10038154
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/038154 | Method and apparatus for protecting flash memory | Jan 2, 2002 | Abandoned |
Array
(
[id] => 1075150
[patent_doc_number] => 06839818
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-01-04
[patent_title] => 'Electrically modifiable, non-volatile, semiconductor memory which can keep a datum stored until an operation to modify the datum is completed'
[patent_app_type] => utility
[patent_app_number] => 10/036088
[patent_app_country] => US
[patent_app_date] => 2001-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 8804
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/839/06839818.pdf
[firstpage_image] =>[orig_patent_app_number] => 10036088
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/036088 | Electrically modifiable, non-volatile, semiconductor memory which can keep a datum stored until an operation to modify the datum is completed | Dec 27, 2001 | Issued |