William R. Carpenter

Array ( [id] => 20507420 [patent_doc_number] => 12541698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Apparatus for low CNOT count quantum point-doubling circuits [patent_app_type] => utility [patent_app_number] => 19/329604 [patent_app_country] => US [patent_app_date] => 2025-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2415 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19329604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19848901 [patent_doc_number] => 20250094252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => PROGRAMMABLE DEVICE, HIERARCHICAL PARALLEL MACHINES, AND METHODS FOR PROVIDING STATE INFORMATION [patent_app_type] => utility [patent_app_number] => 18/962118 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18962118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20124249 [patent_doc_number] => 20250239280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => IMPEDANCE CALIBRATION CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/936744 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20351384 [patent_doc_number] => 20250348236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => ELECTRONIC DEVICE COMMUNICATING WITH EXTERNAL DEVICE, OPERATING METHOD OF ELECTRONIC DEVICE, AND ELECTRONIC SYSTEM INCLUDING ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/932035 [patent_app_country] => US [patent_app_date] => 2024-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18932035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19987571 [patent_doc_number] => 20250125793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => Quantum Controller with Modular and Dynamic Pulse Generation and Routing [patent_app_type] => utility [patent_app_number] => 18/829370 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19646975 [patent_doc_number] => 20240421495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => ANTENNA, WIRELESS COMMUNICATION DEVICE, AND ANTENNA FORMING METHOD [patent_app_type] => utility [patent_app_number] => 18/817647 [patent_app_country] => US [patent_app_date] => 2024-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18817647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20462748 [patent_doc_number] => 20260012178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-08 [patent_title] => PIPELINE CIRCUIT AND PIPELINE OPERATING METHOD [patent_app_type] => utility [patent_app_number] => 18/800151 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800151 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20521840 [patent_doc_number] => 20260045949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => SCALABLE ARBITER FOR NON-PERSISTENT SIGNALS [patent_app_type] => utility [patent_app_number] => 18/800245 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800245 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19605676 [patent_doc_number] => 20240396556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE [patent_app_type] => utility [patent_app_number] => 18/795146 [patent_app_country] => US [patent_app_date] => 2024-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18795146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19774033 [patent_doc_number] => 20250055459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE, AND OPERATION METHOD OF INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/792735 [patent_app_country] => US [patent_app_date] => 2024-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18792735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19758948 [patent_doc_number] => 20250047513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SELF-TIMED READOUT DRIVER FOR LEAKAGE-BASED PHYSICAL UNCLONABLE FUNCTION (L-PUF) DEVICE, L-PUF ARRAY USING SAME, AND APPLICATIONS THEREOF [patent_app_type] => utility [patent_app_number] => 18/791818 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20423587 [patent_doc_number] => 20250385672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => MANAGING ZQ CALIBRATION IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/791254 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19576392 [patent_doc_number] => 20240380684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => FPGA NEIGHBOR OUTPUT MUX DIRECT CONNECTIONS TO MINIMIZE ROUTING HOPS [patent_app_type] => utility [patent_app_number] => 18/782656 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18782656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20581492 [patent_doc_number] => 12573748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Electronic device comprising antenna [patent_app_type] => utility [patent_app_number] => 18/781686 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20596843 [patent_doc_number] => 12580572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => CMOS-to-CML converter, semiconductor device including the same, and electronic device [patent_app_type] => utility [patent_app_number] => 18/778139 [patent_app_country] => US [patent_app_date] => 2024-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18778139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19559665 [patent_doc_number] => 20240371457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => NONVOLATILE MEMORY INCLUDING ON-DIE-TERMINATION CIRCUIT AND STORAGE DEVICE INCLUDING THE NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/776432 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19560745 [patent_doc_number] => 20240372537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => CLOCK GATING CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/777324 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20030726 [patent_doc_number] => 20250168948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => Method and Apparatus for Calculating Duty Cycle of Lighting, Terminal, and Storage Medium [patent_app_type] => utility [patent_app_number] => 18/776014 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19547307 [patent_doc_number] => 20240364343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => LOGIC CIRCUIT FORMED USING UNIPOLAR TRANSISTOR, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/766726 [patent_app_country] => US [patent_app_date] => 2024-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33845 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18766726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20284656 [patent_doc_number] => 20250309898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => APPARATUS INCLUDING A CMOS PASS GATE CIRCUIT AND A BOOTSTRAP CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/760689 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760689 [rel_patent_id] =>[rel_patent_doc_number] =>)