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William Saba

Examiner (ID: 1104)

Most Active Art Unit
1104
Art Unit(s)
1101, 1104
Total Applications
280
Issued Applications
263
Pending Applications
0
Abandoned Applications
17

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2387586 [patent_doc_number] => 04724220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-09 [patent_title] => 'Method for fabricating buried channel field-effect transistor for microwave and millimeter frequencies' [patent_app_type] => 1 [patent_app_number] => 6/817916 [patent_app_country] => US [patent_app_date] => 1986-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 25 [patent_no_of_words] => 5908 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/724/04724220.pdf [firstpage_image] =>[orig_patent_app_number] => 817916 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/817916
Method for fabricating buried channel field-effect transistor for microwave and millimeter frequencies Jan 9, 1986 Issued
Array ( [id] => 2326039 [patent_doc_number] => 04698316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-06 [patent_title] => 'Method of depositing uniformly thick selective epitaxial silicon' [patent_app_type] => 1 [patent_app_number] => 6/802994 [patent_app_country] => US [patent_app_date] => 1985-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3426 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/698/04698316.pdf [firstpage_image] =>[orig_patent_app_number] => 802994 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/802994
Method of depositing uniformly thick selective epitaxial silicon Nov 28, 1985 Issued
Array ( [id] => 2348609 [patent_doc_number] => 04663831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-12 [patent_title] => 'Method of forming transistors with poly-sidewall contacts utilizing deposition of polycrystalline and insulating layers combined with selective etching and oxidation of said layers' [patent_app_type] => 1 [patent_app_number] => 6/785640 [patent_app_country] => US [patent_app_date] => 1985-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 4503 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/663/04663831.pdf [firstpage_image] =>[orig_patent_app_number] => 785640 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/785640
Method of forming transistors with poly-sidewall contacts utilizing deposition of polycrystalline and insulating layers combined with selective etching and oxidation of said layers Oct 7, 1985 Issued
Array ( [id] => 2422807 [patent_doc_number] => 04774195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-09-27 [patent_title] => 'Process for the manufacture of semiconductor layers on semiconductor bodies or for the diffusion of impurities from compounds into semiconductor bodies utilizing an additional generation of activated hydrogen' [patent_app_type] => 1 [patent_app_number] => 6/761383 [patent_app_country] => US [patent_app_date] => 1985-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1245 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/774/04774195.pdf [firstpage_image] =>[orig_patent_app_number] => 761383 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/761383
Process for the manufacture of semiconductor layers on semiconductor bodies or for the diffusion of impurities from compounds into semiconductor bodies utilizing an additional generation of activated hydrogen Jul 31, 1985 Issued
Array ( [id] => 2339279 [patent_doc_number] => 04649626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-17 [patent_title] => 'Semiconductor on insulator edge doping process using an expanded mask' [patent_app_type] => 1 [patent_app_number] => 6/758600 [patent_app_country] => US [patent_app_date] => 1985-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 19 [patent_no_of_words] => 5449 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/649/04649626.pdf [firstpage_image] =>[orig_patent_app_number] => 758600 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/758600
Semiconductor on insulator edge doping process using an expanded mask Jul 23, 1985 Issued
Array ( [id] => 2321193 [patent_doc_number] => 04636269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Epitaxially isolated semiconductor device process utilizing etch and refill technique' [patent_app_type] => 1 [patent_app_number] => 6/750969 [patent_app_country] => US [patent_app_date] => 1985-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 4473 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/636/04636269.pdf [firstpage_image] =>[orig_patent_app_number] => 750969 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/750969
Epitaxially isolated semiconductor device process utilizing etch and refill technique Jul 1, 1985 Issued
06/749921 METHOD FOR EPITAXIALLY GROWING GE X SI 1-X LAYERS ON SI Jun 27, 1985 Abandoned
Array ( [id] => 2288571 [patent_doc_number] => 04659401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-21 [patent_title] => 'Growth of epitaxial films by plasma enchanced chemical vapor deposition (PE-CVD)' [patent_app_type] => 1 [patent_app_number] => 6/742930 [patent_app_country] => US [patent_app_date] => 1985-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3453 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/659/04659401.pdf [firstpage_image] =>[orig_patent_app_number] => 742930 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/742930
Growth of epitaxial films by plasma enchanced chemical vapor deposition (PE-CVD) Jun 9, 1985 Issued
Array ( [id] => 2201360 [patent_doc_number] => 04615103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-07 [patent_title] => 'Method of forming isolation regions containing conductive patterns therein' [patent_app_type] => 1 [patent_app_number] => 6/737922 [patent_app_country] => US [patent_app_date] => 1985-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 45 [patent_no_of_words] => 11301 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/615/04615103.pdf [firstpage_image] =>[orig_patent_app_number] => 737922 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/737922
Method of forming isolation regions containing conductive patterns therein May 27, 1985 Issued
Array ( [id] => 2201379 [patent_doc_number] => 04615104 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-07 [patent_title] => 'Method of forming isolation regions containing conductive patterns therein' [patent_app_type] => 1 [patent_app_number] => 6/738404 [patent_app_country] => US [patent_app_date] => 1985-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 45 [patent_no_of_words] => 11301 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/615/04615104.pdf [firstpage_image] =>[orig_patent_app_number] => 738404 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/738404
Method of forming isolation regions containing conductive patterns therein May 27, 1985 Issued
Array ( [id] => 2277962 [patent_doc_number] => 04651407 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-24 [patent_title] => 'Method of fabricating a junction field effect transistor utilizing epitaxial overgrowth and vertical junction formation' [patent_app_type] => 1 [patent_app_number] => 6/731685 [patent_app_country] => US [patent_app_date] => 1985-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2696 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 419 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/651/04651407.pdf [firstpage_image] =>[orig_patent_app_number] => 731685 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/731685
Method of fabricating a junction field effect transistor utilizing epitaxial overgrowth and vertical junction formation May 7, 1985 Issued
Array ( [id] => 2341611 [patent_doc_number] => 04640720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-03 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 6/725888 [patent_app_country] => US [patent_app_date] => 1985-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3175 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/640/04640720.pdf [firstpage_image] =>[orig_patent_app_number] => 725888 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/725888
Method of manufacturing a semiconductor device Apr 21, 1985 Issued
Array ( [id] => 2255440 [patent_doc_number] => 04611388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-16 [patent_title] => 'Method of forming an indium phosphide-boron phosphide heterojunction bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 6/723423 [patent_app_country] => US [patent_app_date] => 1985-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2473 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/611/04611388.pdf [firstpage_image] =>[orig_patent_app_number] => 723423 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/723423
Method of forming an indium phosphide-boron phosphide heterojunction bipolar transistor Apr 14, 1985 Issued
Array ( [id] => 2383122 [patent_doc_number] => 04662956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-05 [patent_title] => 'Method for prevention of autodoping of epitaxial layers' [patent_app_type] => 1 [patent_app_number] => 6/718758 [patent_app_country] => US [patent_app_date] => 1985-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 2841 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/662/04662956.pdf [firstpage_image] =>[orig_patent_app_number] => 718758 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/718758
Method for prevention of autodoping of epitaxial layers Mar 31, 1985 Issued
Array ( [id] => 2308538 [patent_doc_number] => 04635347 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Method of fabricating titanium silicide gate electrodes and interconnections' [patent_app_type] => 1 [patent_app_number] => 6/717370 [patent_app_country] => US [patent_app_date] => 1985-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2274 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/635/04635347.pdf [firstpage_image] =>[orig_patent_app_number] => 717370 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/717370
Method of fabricating titanium silicide gate electrodes and interconnections Mar 28, 1985 Issued
06/717119 PROCESS FOR THE PRODUCTION OF SEMICONDUCTOR DEVICES Mar 27, 1985 Abandoned
Array ( [id] => 2239476 [patent_doc_number] => 04622083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-11 [patent_title] => 'Molecular beam epitaxial process' [patent_app_type] => 1 [patent_app_number] => 6/710199 [patent_app_country] => US [patent_app_date] => 1985-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 1 [patent_no_of_words] => 1919 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/622/04622083.pdf [firstpage_image] =>[orig_patent_app_number] => 710199 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/710199
Molecular beam epitaxial process Mar 10, 1985 Issued
Array ( [id] => 2241545 [patent_doc_number] => 04632711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-30 [patent_title] => 'Vapor phase epitaxial growth method of zinc selenide and zinc selenide-sulphide by organometallic chemical vapor deposition' [patent_app_type] => 1 [patent_app_number] => 6/707143 [patent_app_country] => US [patent_app_date] => 1985-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5584 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/632/04632711.pdf [firstpage_image] =>[orig_patent_app_number] => 707143 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/707143
Vapor phase epitaxial growth method of zinc selenide and zinc selenide-sulphide by organometallic chemical vapor deposition Feb 28, 1985 Issued
Array ( [id] => 2264930 [patent_doc_number] => 04612072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-16 [patent_title] => 'Method for growing low defect, high purity crystalline layers utilizing lateral overgrowth of a patterned mask' [patent_app_type] => 1 [patent_app_number] => 6/706564 [patent_app_country] => US [patent_app_date] => 1985-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 2111 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/612/04612072.pdf [firstpage_image] =>[orig_patent_app_number] => 706564 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/706564
Method for growing low defect, high purity crystalline layers utilizing lateral overgrowth of a patterned mask Feb 27, 1985 Issued
Array ( [id] => 2337055 [patent_doc_number] => 04661176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-28 [patent_title] => 'Process for improving the quality of epitaxial silicon films grown on insulating substrates utilizing oxygen ion conductor substrates' [patent_app_type] => 1 [patent_app_number] => 6/706205 [patent_app_country] => US [patent_app_date] => 1985-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5997 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/661/04661176.pdf [firstpage_image] =>[orig_patent_app_number] => 706205 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/706205
Process for improving the quality of epitaxial silicon films grown on insulating substrates utilizing oxygen ion conductor substrates Feb 26, 1985 Issued
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