Search

William Shine

Examiner (ID: 19225)

Most Active Art Unit
1106
Art Unit(s)
1107, 1502, 1707, 1106, 1105, 1103
Total Applications
1451
Issued Applications
1302
Pending Applications
0
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19347515 [patent_doc_number] => 20240256478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INTERCONNECT FOR DIRECT MEMORY ACCESS CONTROLLERS [patent_app_type] => utility [patent_app_number] => 18/633984 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633984 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/633984
Interconnect for direct memory access controllers Apr 11, 2024 Issued
Array ( [id] => 20415579 [patent_doc_number] => 12498864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Load-reduced DRAM stack [patent_app_type] => utility [patent_app_number] => 18/607906 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1112 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607906 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607906
Load-reduced DRAM stack Mar 17, 2024 Issued
Array ( [id] => 19530066 [patent_doc_number] => 20240353968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => Communicating between a Virtual Area and a Physical Space [patent_app_type] => utility [patent_app_number] => 18/608103 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608103 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608103
Communicating between a Virtual Area and a Physical Space Mar 17, 2024 Pending
Array ( [id] => 20234429 [patent_doc_number] => 20250291748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => INTERCONNECT PROVIDING FREEDOM FROM INTERFERENCE [patent_app_type] => utility [patent_app_number] => 18/604265 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3284 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604265 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604265
INTERCONNECT PROVIDING FREEDOM FROM INTERFERENCE Mar 12, 2024 Pending
Array ( [id] => 20131049 [patent_doc_number] => 12373362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Semiconductor device and method of building a pooled memory without using switches [patent_app_type] => utility [patent_app_number] => 18/602229 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 3196 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602229 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602229
Semiconductor device and method of building a pooled memory without using switches Mar 11, 2024 Issued
Array ( [id] => 19251159 [patent_doc_number] => 20240202149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => COORDINATING OPERATIONS OF MULTIPLE COMMUNICATION CHIPS VIA LOCAL HUB DEVICE [patent_app_type] => utility [patent_app_number] => 18/592108 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592108 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592108
COORDINATING OPERATIONS OF MULTIPLE COMMUNICATION CHIPS VIA LOCAL HUB DEVICE Feb 28, 2024 Pending
Array ( [id] => 19159585 [patent_doc_number] => 20240152292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => REDUNDANT COMPUTING ACROSS PLANES [patent_app_type] => utility [patent_app_number] => 18/415285 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415285 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415285
Redundant computing across planes Jan 16, 2024 Issued
Array ( [id] => 20043310 [patent_doc_number] => 20250181532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => METHOD AND DEVICE FOR TRANSMITTING DATA BASED ON AUTOMOTIVE ETHERNET, AND VEHICLE DEVICE EMPLOYING METHOD [patent_app_type] => utility [patent_app_number] => 18/413270 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413270 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413270
Method and device for transmitting data based on automotive ethernet, and vehicle device employing method Jan 15, 2024 Issued
Array ( [id] => 19144302 [patent_doc_number] => 20240143214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => THRESHOLD VOLTAGE BIN CALIBRATION AT MEMORY DEVICE POWER UP [patent_app_type] => utility [patent_app_number] => 18/408697 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408697
Threshold voltage bin calibration at memory device power up Jan 9, 2024 Issued
Array ( [id] => 19992745 [patent_doc_number] => 20250130967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => SYSTEMS AND METHODS TO PRECONFIGURE A HARDWARE MODULE [patent_app_type] => utility [patent_app_number] => 18/399475 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399475 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399475
SYSTEMS AND METHODS TO PRECONFIGURE A HARDWARE MODULE Dec 27, 2023 Pending
Array ( [id] => 19450918 [patent_doc_number] => 20240311048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => Performing Coalesced Storage Operations [patent_app_type] => utility [patent_app_number] => 18/394893 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394893 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394893
Performing Coalesced Storage Operations Dec 21, 2023 Pending
Array ( [id] => 20061457 [patent_doc_number] => 20250199679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => NON-VOLATILE MEMORY WITH AN ARBITRATION FUNCTION ON SHARED STATUS CHANNEL [patent_app_type] => utility [patent_app_number] => 18/540664 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540664 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/540664
Non-volatile memory with an arbitration function on shared status channel Dec 13, 2023 Issued
Array ( [id] => 19114956 [patent_doc_number] => 20240126706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => LOCAL PAGE WRITES VIA PRE-STAGING BUFFERS FOR RESILIENT BUFFER POOL EXTENSIONS [patent_app_type] => utility [patent_app_number] => 18/534126 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534126 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534126
Local page writes via pre-staging buffers for resilient buffer pool extensions Dec 7, 2023 Issued
Array ( [id] => 19174616 [patent_doc_number] => 20240160590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SYSTEMS AND METHODS RELATED TO CONFIGURING DEVICES IN A MODULE [patent_app_type] => utility [patent_app_number] => 18/513265 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18513265 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/513265
Systems and methods related to configuring devices in a module Nov 16, 2023 Issued
Array ( [id] => 19451047 [patent_doc_number] => 20240311177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SYSTEM AND METHOD FOR ENHANCING CONTENT COLLABORATION BY CONFLICT DETECTION AND RESOLUTION IN A HYBRID CLOUD CACHE [patent_app_type] => utility [patent_app_number] => 18/511634 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511634 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511634
System and method for enhancing content collaboration by conflict detection and resolution in a hybrid cloud cache Nov 15, 2023 Issued
Array ( [id] => 19582336 [patent_doc_number] => 12148462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => High capacity memory system using standard controller component [patent_app_type] => utility [patent_app_number] => 18/511747 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 76 [patent_no_of_words] => 28254 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511747
High capacity memory system using standard controller component Nov 15, 2023 Issued
Array ( [id] => 20537515 [patent_doc_number] => 12554592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Integration of database with distributed storage system [patent_app_type] => utility [patent_app_number] => 18/510388 [patent_app_country] => US [patent_app_date] => 2023-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510388 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510388
Integration of database with distributed storage system Nov 14, 2023 Issued
Array ( [id] => 20388049 [patent_doc_number] => 12487775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Electronic device for detecting error in field of protocol information unit and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/481234 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 2308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481234 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481234
Electronic device for detecting error in field of protocol information unit and method of operating the same Oct 4, 2023 Issued
Array ( [id] => 19732399 [patent_doc_number] => 12210395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Techniques to enable communication between a processor and voltage regulator [patent_app_type] => utility [patent_app_number] => 18/474377 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 16139 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/474377
Techniques to enable communication between a processor and voltage regulator Sep 25, 2023 Issued
Array ( [id] => 20166740 [patent_doc_number] => 20250258787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => HANDSHAKE SIGNAL SPLITTING CIRCUIT, METHOD, APPARATUS AND DEVICE, AND NON-VOLATILE READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/879709 [patent_app_country] => US [patent_app_date] => 2023-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18879709 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/879709
HANDSHAKE SIGNAL SPLITTING CIRCUIT, METHOD, APPARATUS AND DEVICE, AND NON-VOLATILE READABLE STORAGE MEDIUM Sep 24, 2023 Pending
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