Search

William Shine

Examiner (ID: 19225)

Most Active Art Unit
1106
Art Unit(s)
1107, 1502, 1707, 1106, 1105, 1103
Total Applications
1451
Issued Applications
1302
Pending Applications
0
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19802655 [patent_doc_number] => 20250068580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => PCLE INTERRUPT PROCESSING METHOD AND APPARATUS, DEVICE AND NON-TRANSITORY READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/724870 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18724870 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/724870
PCIe interrupt processing method and apparatus, device and non-transitory readable storage medium Mar 5, 2023 Issued
Array ( [id] => 19856996 [patent_doc_number] => 12259832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Multi-socket network interface controller with consistent transaction ordering [patent_app_type] => utility [patent_app_number] => 18/174668 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7327 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18174668 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/174668
Multi-socket network interface controller with consistent transaction ordering Feb 26, 2023 Issued
Array ( [id] => 18454383 [patent_doc_number] => 20230195663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => INTEGRATED CIRCUIT HAVING LANES INTERCHANGEABLE BETWEEN CLOCK AND DATA LANES IN CLOCK FORWARD INTERFACE RECEIVER [patent_app_type] => utility [patent_app_number] => 18/172863 [patent_app_country] => US [patent_app_date] => 2023-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172863 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/172863
Integrated circuit having lanes interchangeable between clock and data lanes in clock forward interface receiver Feb 21, 2023 Issued
Array ( [id] => 19107663 [patent_doc_number] => 11960772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Pipeline using match-action blocks [patent_app_type] => utility [patent_app_number] => 18/167618 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 12689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167618 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/167618
Pipeline using match-action blocks Feb 9, 2023 Issued
Array ( [id] => 18532973 [patent_doc_number] => 20230238048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => HIGH CAPACITY MEMORY SYSTEM USING STANDARD CONTROLLER COMPONENT [patent_app_type] => utility [patent_app_number] => 18/102903 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18102903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/102903
High capacity memory system using standard controller component Jan 29, 2023 Issued
Array ( [id] => 19243356 [patent_doc_number] => 12013795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-06-18 [patent_title] => System and method for managing ports of data processing systems and attached devices [patent_app_type] => utility [patent_app_number] => 18/159914 [patent_app_country] => US [patent_app_date] => 2023-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8542 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18159914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/159914
System and method for managing ports of data processing systems and attached devices Jan 25, 2023 Issued
Array ( [id] => 19334297 [patent_doc_number] => 20240248727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SYSTEM AND METHOD FOR UPDATING FIRMWARE OF HEADPHONES WITH DEDICATED EARPIECE CONTROLLERS [patent_app_type] => utility [patent_app_number] => 18/157474 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18157474 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/157474
System and method for updating firmware of headphones with dedicated earpiece controllers Jan 19, 2023 Issued
Array ( [id] => 18393289 [patent_doc_number] => 20230161509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => DYNAMIC SELECTION OF CORES FOR PROCESSING RESPONSES [patent_app_type] => utility [patent_app_number] => 18/099504 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099504
Dynamic selection of cores for processing responses Jan 19, 2023 Issued
Array ( [id] => 19212281 [patent_doc_number] => 12001343 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-06-04 [patent_title] => Selective distribution of translation entry invalidation requests in a multithreaded data processing system [patent_app_type] => utility [patent_app_number] => 18/091706 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 39 [patent_no_of_words] => 21798 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/091706
Selective distribution of translation entry invalidation requests in a multithreaded data processing system Dec 29, 2022 Issued
Array ( [id] => 19267455 [patent_doc_number] => 20240211158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => REDUCING PROVISIONED STORAGE CAPACITY OF AN AGGREGATE OF A STORAGE APPLIANCE [patent_app_type] => utility [patent_app_number] => 18/146530 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146530 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146530
Reducing provisioned storage capacity of an aggregate of a storage appliance Dec 26, 2022 Issued
Array ( [id] => 19849017 [patent_doc_number] => 20250094368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => FIFO DATA BUFFER WITH MULTI-LOAD [patent_app_type] => utility [patent_app_number] => 18/729643 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18729643 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/729643
FIFO data buffer with multi-load Dec 26, 2022 Issued
Array ( [id] => 19212636 [patent_doc_number] => 12001699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Memory device performing configurable mode setting and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/145186 [patent_app_country] => US [patent_app_date] => 2022-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18145186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/145186
Memory device performing configurable mode setting and method of operating the same Dec 21, 2022 Issued
Array ( [id] => 19794832 [patent_doc_number] => 12235779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Time-sensitive network switch [patent_app_type] => utility [patent_app_number] => 18/041790 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3696 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18041790 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/041790
Time-sensitive network switch Dec 14, 2022 Issued
Array ( [id] => 19293142 [patent_doc_number] => 12032495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => System and method for securely connecting to a peripheral device [patent_app_type] => utility [patent_app_number] => 18/078969 [patent_app_country] => US [patent_app_date] => 2022-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 68633 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078969 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/078969
System and method for securely connecting to a peripheral device Dec 10, 2022 Issued
Array ( [id] => 19235912 [patent_doc_number] => 20240193107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => FIRST-IN, FIRST-OUT BUFFER [patent_app_type] => utility [patent_app_number] => 18/077286 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18077286 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/077286
First-in, first-out buffer Dec 7, 2022 Issued
Array ( [id] => 19204852 [patent_doc_number] => 20240176751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MULTIPLE-CORE MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/059937 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059937 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/059937
Multiple-core memory controller Nov 28, 2022 Issued
Array ( [id] => 18244051 [patent_doc_number] => 20230076362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => WORD LINE GROUP READ COUNTERS [patent_app_type] => utility [patent_app_number] => 17/984929 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984929
Word line group read counters Nov 9, 2022 Issued
Array ( [id] => 19827926 [patent_doc_number] => 12248708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => System supporting virtualization of SR-IOV capable devices [patent_app_type] => utility [patent_app_number] => 17/975211 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 50 [patent_no_of_words] => 37956 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975211 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975211
System supporting virtualization of SR-IOV capable devices Oct 26, 2022 Issued
Array ( [id] => 19129197 [patent_doc_number] => 20240134550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => ZONED NAMESPACE STORAGE DEVICE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/969917 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969917
Zoned namespace storage device system Oct 19, 2022 Issued
Array ( [id] => 19129197 [patent_doc_number] => 20240134550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => ZONED NAMESPACE STORAGE DEVICE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/969917 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969917
Zoned namespace storage device system Oct 19, 2022 Issued
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