Search

William W. Moore

Examiner (ID: 256, Phone: (571)272-0933 , Office: P/1656 )

Most Active Art Unit
1656
Art Unit(s)
1652, 1656, 1814, 1805
Total Applications
1409
Issued Applications
808
Pending Applications
131
Abandoned Applications
470

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17115642 [patent_doc_number] => 20210296239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/172470 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172470
Semiconductor storage device Feb 9, 2021 Issued
Array ( [id] => 19081024 [patent_doc_number] => 11950417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/172458 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 33 [patent_no_of_words] => 11882 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172458
Semiconductor device Feb 9, 2021 Issued
Array ( [id] => 17303164 [patent_doc_number] => 20210399003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/149967 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/149967
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE Jan 14, 2021 Abandoned
Array ( [id] => 16765550 [patent_doc_number] => 20210111132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => Method for Substrate Moisture NCF Voiding Elimination [patent_app_type] => utility [patent_app_number] => 17/130086 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130086 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/130086
Method for Substrate Moisture NCF Voiding Elimination Dec 21, 2020 Pending
Array ( [id] => 17551670 [patent_doc_number] => 20220123012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => THREE-DIMENSIONAL NAND MEMORY DEVICE WITH SPLIT GATES [patent_app_type] => utility [patent_app_number] => 17/113624 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113624 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113624
Three-dimensional NAND memory device with split gates Dec 6, 2020 Issued
Array ( [id] => 16781969 [patent_doc_number] => 20210119048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => DOPING PROFILE FOR STRAINED SOURCE/DRAIN REGION [patent_app_type] => utility [patent_app_number] => 17/110592 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17110592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/110592
Doping profile for strained source/drain region Dec 2, 2020 Issued
Array ( [id] => 17630731 [patent_doc_number] => 20220165746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/102563 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17102563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/102563
Semiconductor device and method for fabricating the same Nov 23, 2020 Issued
Array ( [id] => 16873519 [patent_doc_number] => 20210166986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => PACKAGE WITH ENCAPSULANT UNDER COMPRESSIVE STRESS [patent_app_type] => utility [patent_app_number] => 17/101387 [patent_app_country] => US [patent_app_date] => 2020-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17101387 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/101387
PACKAGE WITH ENCAPSULANT UNDER COMPRESSIVE STRESS Nov 22, 2020 Abandoned
Array ( [id] => 18857527 [patent_doc_number] => 11855124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Vertically integrated device stack including system on chip and power management integrated circuit [patent_app_type] => utility [patent_app_number] => 17/096828 [patent_app_country] => US [patent_app_date] => 2020-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 11342 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17096828 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/096828
Vertically integrated device stack including system on chip and power management integrated circuit Nov 11, 2020 Issued
Array ( [id] => 18039990 [patent_doc_number] => 20220384207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => IMAGING DEVICE AND METHOD OF MANUFACTURING IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 17/775988 [patent_app_country] => US [patent_app_date] => 2020-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17775988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/775988
IMAGING DEVICE AND METHOD OF MANUFACTURING IMAGING DEVICE Nov 10, 2020 Pending
Array ( [id] => 16625124 [patent_doc_number] => 20210043777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => Trenched MOS Gate Controller Rectifier [patent_app_type] => utility [patent_app_number] => 17/082183 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082183
Trenched MOS Gate Controller Rectifier Oct 27, 2020 Abandoned
Array ( [id] => 17971425 [patent_doc_number] => 11488975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Multi-tier three-dimensional memory device with nested contact via structures and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/081458 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 33 [patent_no_of_words] => 10995 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/081458
Multi-tier three-dimensional memory device with nested contact via structures and methods for forming the same Oct 26, 2020 Issued
Array ( [id] => 17339482 [patent_doc_number] => 20220005813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/078736 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078736 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078736
Semiconductor device and method for fabricating the same Oct 22, 2020 Issued
Array ( [id] => 19108675 [patent_doc_number] => 11961789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/074652 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 5954 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074652
Semiconductor package and manufacturing method thereof Oct 19, 2020 Issued
Array ( [id] => 16796071 [patent_doc_number] => 20210125888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/074538 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074538 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074538
ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF Oct 18, 2020 Abandoned
Array ( [id] => 17247129 [patent_doc_number] => 20210366874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => STACK PACKAGE INCLUDING CORE DIE STACKED OVER A CONTROLLER DIE [patent_app_type] => utility [patent_app_number] => 17/072959 [patent_app_country] => US [patent_app_date] => 2020-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17072959 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/072959
Stack package including core die stacked over a controller die Oct 15, 2020 Issued
Array ( [id] => 18798578 [patent_doc_number] => 11832446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 17/065508 [patent_app_country] => US [patent_app_date] => 2020-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2768 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17065508 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/065508
Three-dimensional memory device Oct 6, 2020 Issued
Array ( [id] => 17448441 [patent_doc_number] => 20220068946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => ON-CHIP CAPACITOR STRUCTURES IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/038385 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038385 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/038385
ON-CHIP CAPACITOR STRUCTURES IN SEMICONDUCTOR DEVICES Sep 29, 2020 Abandoned
Array ( [id] => 16579047 [patent_doc_number] => 20210013448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/038891 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/038891
Semiconductor device Sep 29, 2020 Issued
Array ( [id] => 19330452 [patent_doc_number] => 12048152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Vertical memory devices [patent_app_type] => utility [patent_app_number] => 17/035930 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 17065 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 480 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035930 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/035930
Vertical memory devices Sep 28, 2020 Issued
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