![](/images/general/no_picture/200_user.png)
Willie L Davis
Examiner (ID: 16130)
Most Active Art Unit | 2877 |
Art Unit(s) | 2877 |
Total Applications | 12 |
Issued Applications | 10 |
Pending Applications | 0 |
Abandoned Applications | 2 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 16515825
[patent_doc_number] => 20200395083
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => SENSING CIRCUIT OF MEMORY DEVICE AND ASSOCIATED SENSING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/008746
[patent_app_country] => US
[patent_app_date] => 2020-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4386
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008746
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/008746 | Sensing circuit of memory device and associated sensing method | Aug 31, 2020 | Issued |
Array
(
[id] => 17716378
[patent_doc_number] => 11380376
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-05
[patent_title] => Apparatuses and methods to perform low latency access of a memory
[patent_app_type] => utility
[patent_app_number] => 17/003913
[patent_app_country] => US
[patent_app_date] => 2020-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6707
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003913
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/003913 | Apparatuses and methods to perform low latency access of a memory | Aug 25, 2020 | Issued |
Array
(
[id] => 17932969
[patent_doc_number] => 20220328095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => MEMORY DEVICE, AND METHOD FOR DRIVING MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/641500
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8322
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17641500
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/641500 | Memory device, and method for driving memory | Aug 24, 2020 | Issued |
Array
(
[id] => 18016128
[patent_doc_number] => 11508431
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Logical operations using a logical operation component
[patent_app_type] => utility
[patent_app_number] => 17/001534
[patent_app_country] => US
[patent_app_date] => 2020-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 11263
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001534
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/001534 | Logical operations using a logical operation component | Aug 23, 2020 | Issued |
Array
(
[id] => 17018154
[patent_doc_number] => 11087799
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-10
[patent_title] => Magnetic random access memory reference voltage generation
[patent_app_type] => utility
[patent_app_number] => 16/996675
[patent_app_country] => US
[patent_app_date] => 2020-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5807
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996675
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/996675 | Magnetic random access memory reference voltage generation | Aug 17, 2020 | Issued |
Array
(
[id] => 17253861
[patent_doc_number] => 11189357
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-30
[patent_title] => Programmable memory device
[patent_app_type] => utility
[patent_app_number] => 16/989268
[patent_app_country] => US
[patent_app_date] => 2020-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 7096
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16989268
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/989268 | Programmable memory device | Aug 9, 2020 | Issued |
Array
(
[id] => 16585812
[patent_doc_number] => 20210020214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-21
[patent_title] => APPARATUSES AND METHODS INVOLVING ACCESSING DISTRIBUTED SUB-BLOCKS OF MEMORY CELLS
[patent_app_type] => utility
[patent_app_number] => 16/983604
[patent_app_country] => US
[patent_app_date] => 2020-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4261
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983604
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/983604 | Apparatuses and methods involving accessing distributed sub-blocks of memory cells | Aug 2, 2020 | Issued |
Array
(
[id] => 16425118
[patent_doc_number] => 20200350316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-05
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/933041
[patent_app_country] => US
[patent_app_date] => 2020-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8843
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933041
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/933041 | Semiconductor device including side surface conductor contact | Jul 19, 2020 | Issued |
Array
(
[id] => 17289092
[patent_doc_number] => 11205653
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-21
[patent_title] => Semiconductor memory device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/932304
[patent_app_country] => US
[patent_app_date] => 2020-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 9153
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932304
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/932304 | Semiconductor memory device and manufacturing method thereof | Jul 16, 2020 | Issued |
Array
(
[id] => 17010679
[patent_doc_number] => 20210241840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-05
[patent_title] => MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/930919
[patent_app_country] => US
[patent_app_date] => 2020-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8004
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16930919
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/930919 | Memory system and method of operating the same | Jul 15, 2020 | Issued |
Array
(
[id] => 16888647
[patent_doc_number] => 20210174844
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-10
[patent_title] => DATA RECEIVING DEVICES, MEMORY DEVICES HAVING THE SAME, AND OPERATING METHODS THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/930561
[patent_app_country] => US
[patent_app_date] => 2020-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7180
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16930561
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/930561 | Data receiving devices, memory devices having the same, and operating methods thereof | Jul 15, 2020 | Issued |
Array
(
[id] => 17092658
[patent_doc_number] => 11120851
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-09-14
[patent_title] => Memory apparatus and burst read and burst write method thereof
[patent_app_type] => utility
[patent_app_number] => 16/926773
[patent_app_country] => US
[patent_app_date] => 2020-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3356
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16926773
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/926773 | Memory apparatus and burst read and burst write method thereof | Jul 11, 2020 | Issued |
Array
(
[id] => 17152273
[patent_doc_number] => 11145360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Semiconductor memory device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/925925
[patent_app_country] => US
[patent_app_date] => 2020-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 20
[patent_no_of_words] => 7693
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16925925
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/925925 | Semiconductor memory device and manufacturing method thereof | Jul 9, 2020 | Issued |
Array
(
[id] => 17195845
[patent_doc_number] => 11164610
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-02
[patent_title] => Memory device with built-in flexible double redundancy
[patent_app_type] => utility
[patent_app_number] => 16/894606
[patent_app_country] => US
[patent_app_date] => 2020-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 12809
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16894606
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/894606 | Memory device with built-in flexible double redundancy | Jun 4, 2020 | Issued |
Array
(
[id] => 16285998
[patent_doc_number] => 20200279600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/879248
[patent_app_country] => US
[patent_app_date] => 2020-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10882
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879248
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/879248 | Semiconductor device | May 19, 2020 | Issued |
Array
(
[id] => 16286010
[patent_doc_number] => 20200279612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => MEMORY DEVICE AND MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/875375
[patent_app_country] => US
[patent_app_date] => 2020-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19900
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875375
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/875375 | Memory system for activating redundancy memory cell and operating method thereof | May 14, 2020 | Issued |
Array
(
[id] => 16272021
[patent_doc_number] => 20200273509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-27
[patent_title] => MEMORY DEVICE IN WHICH LOCATIONS OF REGISTERS STORING FAIL ADDRESSES ARE MERGED
[patent_app_type] => utility
[patent_app_number] => 16/872429
[patent_app_country] => US
[patent_app_date] => 2020-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12823
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872429
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/872429 | Memory device in which locations of registers storing fail addresses are merged | May 11, 2020 | Issued |
Array
(
[id] => 16958900
[patent_doc_number] => 11062777
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-13
[patent_title] => Nonvolatile semiconductor memory device which performs improved erase operation
[patent_app_type] => utility
[patent_app_number] => 16/871578
[patent_app_country] => US
[patent_app_date] => 2020-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6080
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871578
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/871578 | Nonvolatile semiconductor memory device which performs improved erase operation | May 10, 2020 | Issued |
Array
(
[id] => 17239340
[patent_doc_number] => 11183227
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-23
[patent_title] => Electric field switchable magnetic devices
[patent_app_type] => utility
[patent_app_number] => 16/861869
[patent_app_country] => US
[patent_app_date] => 2020-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 40
[patent_no_of_words] => 11514
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861869
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/861869 | Electric field switchable magnetic devices | Apr 28, 2020 | Issued |
Array
(
[id] => 16241333
[patent_doc_number] => 20200258567
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-13
[patent_title] => METHOD OF OPERATING MEMORY DEVICE AND MEMORY DEVICE PERFORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/851744
[patent_app_country] => US
[patent_app_date] => 2020-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11273
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16851744
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/851744 | Method of refreshing memory using multiple operating voltages and memory device performing the same | Apr 16, 2020 | Issued |