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Willie L Davis

Examiner (ID: 16130)

Most Active Art Unit
2877
Art Unit(s)
2877
Total Applications
12
Issued Applications
10
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16495472 [patent_doc_number] => 10861519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Apparatuses and methods for targeted refreshing of memory [patent_app_type] => utility [patent_app_number] => 16/375764 [patent_app_country] => US [patent_app_date] => 2019-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 11850 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16375764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/375764
Apparatuses and methods for targeted refreshing of memory Apr 3, 2019 Issued
Array ( [id] => 15856835 [patent_doc_number] => 10643712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Semiconductor memory device for improving high temperature data retention [patent_app_type] => utility [patent_app_number] => 16/361242 [patent_app_country] => US [patent_app_date] => 2019-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6881 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/361242
Semiconductor memory device for improving high temperature data retention Mar 21, 2019 Issued
Array ( [id] => 15822539 [patent_doc_number] => 10636461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Apparatuses and methods for providing multiphase clock signals [patent_app_type] => utility [patent_app_number] => 16/357700 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 11843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357700 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/357700
Apparatuses and methods for providing multiphase clock signals Mar 18, 2019 Issued
Array ( [id] => 16132013 [patent_doc_number] => 10699773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor device for compensating offset of sense amplifier [patent_app_type] => utility [patent_app_number] => 16/294655 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10866 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/294655
Semiconductor device for compensating offset of sense amplifier Mar 5, 2019 Issued
Array ( [id] => 14509693 [patent_doc_number] => 20190198501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/292667 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16292667 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/292667
Semiconductor memory device comprising memory cell over driver Mar 4, 2019 Issued
Array ( [id] => 14509745 [patent_doc_number] => 20190198527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/290060 [patent_app_country] => US [patent_app_date] => 2019-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16290060 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/290060
Semiconductor memory device Feb 28, 2019 Issued
Array ( [id] => 14475059 [patent_doc_number] => 20190189175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR LOGIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/285948 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16285948 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/285948
Semiconductor device and semiconductor logic device Feb 25, 2019 Issued
Array ( [id] => 16200743 [patent_doc_number] => 10725906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Storage device that restores data lost during a subsequent data write [patent_app_type] => utility [patent_app_number] => 16/279787 [patent_app_country] => US [patent_app_date] => 2019-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 17381 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16279787 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/279787
Storage device that restores data lost during a subsequent data write Feb 18, 2019 Issued
Array ( [id] => 16193888 [patent_doc_number] => 20200234737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => LEAKAGE CURRENT REDUCTION IN A DUAL RAIL DEVICE [patent_app_type] => utility [patent_app_number] => 16/253210 [patent_app_country] => US [patent_app_date] => 2019-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/253210
Leakage current reduction in a dual rail device Jan 20, 2019 Issued
Array ( [id] => 16194241 [patent_doc_number] => 20200235090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE CONTAINING BOND PAD-BASED POWER SUPPLY NETWORK FOR A SOURCE LINE AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/251954 [patent_app_country] => US [patent_app_date] => 2019-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16251954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/251954
Three-dimensional memory device containing bond pad-based power supply network for a source line and methods of making the same Jan 17, 2019 Issued
Array ( [id] => 15351155 [patent_doc_number] => 20200013469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => COLUMN ERASING IN NON-VOLATILE MEMORY STRINGS [patent_app_type] => utility [patent_app_number] => 16/252300 [patent_app_country] => US [patent_app_date] => 2019-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16252300 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/252300
Column erasing in non-volatile memory strings Jan 17, 2019 Issued
Array ( [id] => 16067191 [patent_doc_number] => 10692555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Semiconductor memory devices enabling read strobe mode and related methods of operating semiconductor memory devices [patent_app_type] => utility [patent_app_number] => 16/249594 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 11408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249594 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/249594
Semiconductor memory devices enabling read strobe mode and related methods of operating semiconductor memory devices Jan 15, 2019 Issued
Array ( [id] => 14842589 [patent_doc_number] => 20190279695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => APPARATUSES AND METHODS INVOLVING ACCESSING DISTRIBUTED SUB-BLOCKS OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/237346 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237346 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/237346
Apparatuses and methods involving accessing distributed sub-blocks of memory cells Dec 30, 2018 Issued
Array ( [id] => 16147661 [patent_doc_number] => 10706905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-07 [patent_title] => Single path memory sense amplifier circuit [patent_app_type] => utility [patent_app_number] => 16/234954 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234954
Single path memory sense amplifier circuit Dec 27, 2018 Issued
Array ( [id] => 15759817 [patent_doc_number] => 10622035 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-14 [patent_title] => Sense amplifier, sensing method and non-volatile memory using the same [patent_app_type] => utility [patent_app_number] => 16/234580 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234580
Sense amplifier, sensing method and non-volatile memory using the same Dec 27, 2018 Issued
Array ( [id] => 14541695 [patent_doc_number] => 20190206469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => DYNAMIC REFERENCE SCHEME FOR IMPROVING READ MARGIN OF RESISTIVE MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 16/234876 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234876
Dynamic reference scheme for improving read margin of resistive memory array Dec 27, 2018 Issued
Array ( [id] => 16645316 [patent_doc_number] => 10923180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Sensing techniques using a charge transfer device [patent_app_type] => utility [patent_app_number] => 16/232280 [patent_app_country] => US [patent_app_date] => 2018-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 25653 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16232280 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/232280
Sensing techniques using a charge transfer device Dec 25, 2018 Issued
Array ( [id] => 16119163 [patent_doc_number] => 20200211604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => SENSE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/232916 [patent_app_country] => US [patent_app_date] => 2018-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16511 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16232916 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/232916
Sensing architecture Dec 25, 2018 Issued
Array ( [id] => 16047623 [patent_doc_number] => 10685690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Memory device in which locations of registers storing fail addresses are merged [patent_app_type] => utility [patent_app_number] => 16/222114 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12807 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222114 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/222114
Memory device in which locations of registers storing fail addresses are merged Dec 16, 2018 Issued
Array ( [id] => 15374281 [patent_doc_number] => 10528862 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-07 [patent_title] => Neural network system and method for controlling the same [patent_app_type] => utility [patent_app_number] => 16/222222 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5874 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/222222
Neural network system and method for controlling the same Dec 16, 2018 Issued
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