Search

Willie L Davis

Examiner (ID: 5098)

Most Active Art Unit
2877
Art Unit(s)
2877
Total Applications
12
Issued Applications
10
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15015523 [patent_doc_number] => 10453922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Conformal doping for punch through stopper in fin field effect transistor devices [patent_app_type] => utility [patent_app_number] => 15/358661 [patent_app_country] => US [patent_app_date] => 2016-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7035 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15358661 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/358661
Conformal doping for punch through stopper in fin field effect transistor devices Nov 21, 2016 Issued
Array ( [id] => 13753533 [patent_doc_number] => 10169714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Modular array of vertically integrated superconducting qubit devices for scalable quantum computing [patent_app_type] => utility [patent_app_number] => 15/347160 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9014 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347160
Modular array of vertically integrated superconducting qubit devices for scalable quantum computing Nov 8, 2016 Issued
Array ( [id] => 13950729 [patent_doc_number] => 10211143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Semiconductor device having polyimide layer [patent_app_type] => utility [patent_app_number] => 15/340945 [patent_app_country] => US [patent_app_date] => 2016-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8265 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15340945 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/340945
Semiconductor device having polyimide layer Oct 31, 2016 Issued
Array ( [id] => 12650340 [patent_doc_number] => 20180108611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => SPLIT RAIL STRUCTURES LOCATED IN ADJACENT METAL LAYERS [patent_app_type] => utility [patent_app_number] => 15/294286 [patent_app_country] => US [patent_app_date] => 2016-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15294286 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/294286
Split rail structures located in adjacent metal layers Oct 13, 2016 Issued
Array ( [id] => 13293291 [patent_doc_number] => 10157846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Method for forming chip package involving cutting process [patent_app_type] => utility [patent_app_number] => 15/292762 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292762 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292762
Method for forming chip package involving cutting process Oct 12, 2016 Issued
Array ( [id] => 13665525 [patent_doc_number] => 10162926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Stacked chip layout having overlapped regions [patent_app_type] => utility [patent_app_number] => 15/291474 [patent_app_country] => US [patent_app_date] => 2016-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 8287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291474 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/291474
Stacked chip layout having overlapped regions Oct 11, 2016 Issued
Array ( [id] => 11424989 [patent_doc_number] => 20170033136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'Method Of Making A Sensor Package With Cooling Feature' [patent_app_type] => utility [patent_app_number] => 15/290522 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3430 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290522 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/290522
Method of making a sensor package with cooling feature Oct 10, 2016 Issued
Array ( [id] => 12175069 [patent_doc_number] => 09893218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Sensor package with cooling feature' [patent_app_type] => utility [patent_app_number] => 15/290623 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 3253 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290623 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/290623
Sensor package with cooling feature Oct 10, 2016 Issued
Array ( [id] => 11694641 [patent_doc_number] => 20170170358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'METHOD OF FORMING AN INFRARED PHOTODETECTOR' [patent_app_type] => utility [patent_app_number] => 15/287218 [patent_app_country] => US [patent_app_date] => 2016-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3626 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15287218 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/287218
Method of forming an infrared photodetector Oct 5, 2016 Issued
Array ( [id] => 11404892 [patent_doc_number] => 20170025430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING DIFFERENT ORIENTATIONS OF MEMORY CELL ARRAY AND PERIPHERAL CIRCUIT TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 15/285709 [patent_app_country] => US [patent_app_date] => 2016-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11564 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15285709 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/285709
Semiconductor device including different orientations of memory cell array and peripheral circuit transistors Oct 4, 2016 Issued
Array ( [id] => 14125943 [patent_doc_number] => 10249837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Light-emitting element, light-emitting device, electronic device, and lighting device [patent_app_type] => utility [patent_app_number] => 15/278379 [patent_app_country] => US [patent_app_date] => 2016-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 12802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15278379 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/278379
Light-emitting element, light-emitting device, electronic device, and lighting device Sep 27, 2016 Issued
Array ( [id] => 13420489 [patent_doc_number] => 20180261787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => ELECTROLUMINESCENCE DEVICE AND METHOD FOR PRODUCING SAME [patent_app_type] => utility [patent_app_number] => 15/762132 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15762132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/762132
Electroluminescence device and method for producing same Sep 25, 2016 Issued
Array ( [id] => 12216544 [patent_doc_number] => 09913375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Multi-stacked electronic device with defect-free solder connection' [patent_app_type] => utility [patent_app_number] => 15/276073 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2623 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15276073 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/276073
Multi-stacked electronic device with defect-free solder connection Sep 25, 2016 Issued
Array ( [id] => 12040406 [patent_doc_number] => 09818641 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-14 [patent_title] => 'Apparatus and method of forming self-aligned cuts in mandrel and a non-mandrel lines of an array of metal lines' [patent_app_type] => utility [patent_app_number] => 15/271497 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 7102 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271497 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271497
Apparatus and method of forming self-aligned cuts in mandrel and a non-mandrel lines of an array of metal lines Sep 20, 2016 Issued
Array ( [id] => 12040404 [patent_doc_number] => 09818640 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-14 [patent_title] => 'Apparatus and method of forming self-aligned cuts in a non-mandrel line of an array of metal lines' [patent_app_type] => utility [patent_app_number] => 15/271475 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 5619 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271475 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271475
Apparatus and method of forming self-aligned cuts in a non-mandrel line of an array of metal lines Sep 20, 2016 Issued
Array ( [id] => 13682847 [patent_doc_number] => 20160380160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE WITH PHOSPHOR LAYER [patent_app_type] => utility [patent_app_number] => 15/259691 [patent_app_country] => US [patent_app_date] => 2016-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15259691 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/259691
Method for manufacturing light emitting device with phosphor layer Sep 7, 2016 Issued
Array ( [id] => 15319177 [patent_doc_number] => 10524319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Organic electroluminescent light emitting device [patent_app_type] => utility [patent_app_number] => 16/076169 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 12309 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16076169 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/076169
Organic electroluminescent light emitting device Aug 31, 2016 Issued
Array ( [id] => 12457272 [patent_doc_number] => 09984962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-29 [patent_title] => Systems and methods for hybrid flexible electronics with rigid integrated circuits [patent_app_type] => utility [patent_app_number] => 15/251512 [patent_app_country] => US [patent_app_date] => 2016-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 6143 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 450 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15251512 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/251512
Systems and methods for hybrid flexible electronics with rigid integrated circuits Aug 29, 2016 Issued
Array ( [id] => 13057151 [patent_doc_number] => 10049974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Metal silicate spacers for fully aligned vias [patent_app_type] => utility [patent_app_number] => 15/251450 [patent_app_country] => US [patent_app_date] => 2016-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3818 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15251450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/251450
Metal silicate spacers for fully aligned vias Aug 29, 2016 Issued
Array ( [id] => 12109068 [patent_doc_number] => 09865557 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-09 [patent_title] => 'Reduction of solder interconnect stress' [patent_app_type] => utility [patent_app_number] => 15/251325 [patent_app_country] => US [patent_app_date] => 2016-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 9855 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15251325 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/251325
Reduction of solder interconnect stress Aug 29, 2016 Issued
Menu