Willie L Davis
Examiner (ID: 5098)
Most Active Art Unit | 2877 |
Art Unit(s) | 2877 |
Total Applications | 12 |
Issued Applications | 10 |
Pending Applications | 0 |
Abandoned Applications | 2 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 10718265
[patent_doc_number] => 20160064412
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-03
[patent_title] => 'DISPLAY SUBSTRATE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/725993
[patent_app_country] => US
[patent_app_date] => 2015-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4132
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725993
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/725993 | Display substrate including direct contact part and method of fabricating the same | May 28, 2015 | Issued |
Array
(
[id] => 11234022
[patent_doc_number] => 09461259
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-10-04
[patent_title] => 'Light-emitting element, light-emitting device, electronic device, and lighting device'
[patent_app_type] => utility
[patent_app_number] => 14/718689
[patent_app_country] => US
[patent_app_date] => 2015-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 14595
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14718689
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/718689 | Light-emitting element, light-emitting device, electronic device, and lighting device | May 20, 2015 | Issued |
Array
(
[id] => 11751516
[patent_doc_number] => 09709524
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-18
[patent_title] => 'Integrated circuit device with adaptations for multiplexed biosensing'
[patent_app_type] => utility
[patent_app_number] => 14/713543
[patent_app_country] => US
[patent_app_date] => 2015-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 10731
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14713543
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/713543 | Integrated circuit device with adaptations for multiplexed biosensing | May 14, 2015 | Issued |
Array
(
[id] => 11273724
[patent_doc_number] => 20160336270
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'SEMICONDUCTOR STRUCTURE AND PROCESS FOR FORMING PLUG'
[patent_app_type] => utility
[patent_app_number] => 14/710583
[patent_app_country] => US
[patent_app_date] => 2015-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3778
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14710583
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/710583 | Semiconductor structure and process for forming plug including layer with pulled back sidewall part | May 11, 2015 | Issued |
Array
(
[id] => 11796893
[patent_doc_number] => 09406743
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-08-02
[patent_title] => 'Semiconductor device with counter doped layer'
[patent_app_type] => utility
[patent_app_number] => 14/706329
[patent_app_country] => US
[patent_app_date] => 2015-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 39
[patent_no_of_words] => 8903
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14706329
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/706329 | Semiconductor device with counter doped layer | May 6, 2015 | Issued |
Array
(
[id] => 11125366
[patent_doc_number] => 20160322340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-03
[patent_title] => 'SEMICONDUCTOR DIE ASSEMBLY AND METHODS OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/700222
[patent_app_country] => US
[patent_app_date] => 2015-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5560
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14700222
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/700222 | Semiconductor die assembly and methods of forming thermal paths | Apr 29, 2015 | Issued |
Array
(
[id] => 11876432
[patent_doc_number] => 09748212
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-29
[patent_title] => 'Shadow pad for post-passivation interconnect structures'
[patent_app_type] => utility
[patent_app_number] => 14/701274
[patent_app_country] => US
[patent_app_date] => 2015-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 12646
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14701274
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/701274 | Shadow pad for post-passivation interconnect structures | Apr 29, 2015 | Issued |
Array
(
[id] => 11585850
[patent_doc_number] => 09640502
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-02
[patent_title] => 'Stacked semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/700160
[patent_app_country] => US
[patent_app_date] => 2015-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 4341
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14700160
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/700160 | Stacked semiconductor device | Apr 29, 2015 | Issued |
Array
(
[id] => 12498435
[patent_doc_number] => 09997439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-12
[patent_title] => Method for fabricating an advanced routable quad flat no-lead package
[patent_app_type] => utility
[patent_app_number] => 14/701404
[patent_app_country] => US
[patent_app_date] => 2015-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 33
[patent_no_of_words] => 5398
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14701404
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/701404 | Method for fabricating an advanced routable quad flat no-lead package | Apr 29, 2015 | Issued |
Array
(
[id] => 11862000
[patent_doc_number] => 09741691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Power delivery network (PDN) design for monolithic three-dimensional (3-D) integrated circuit (IC)'
[patent_app_type] => utility
[patent_app_number] => 14/698842
[patent_app_country] => US
[patent_app_date] => 2015-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 7103
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14698842
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/698842 | Power delivery network (PDN) design for monolithic three-dimensional (3-D) integrated circuit (IC) | Apr 28, 2015 | Issued |
Array
(
[id] => 12012742
[patent_doc_number] => 09806063
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-31
[patent_title] => 'Reinforced wafer level package comprising a core layer for reducing stress in a solder joint and improving solder joint reliability'
[patent_app_type] => utility
[patent_app_number] => 14/699863
[patent_app_country] => US
[patent_app_date] => 2015-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 28
[patent_no_of_words] => 12091
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14699863
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/699863 | Reinforced wafer level package comprising a core layer for reducing stress in a solder joint and improving solder joint reliability | Apr 28, 2015 | Issued |
Array
(
[id] => 10343708
[patent_doc_number] => 20150228713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-13
[patent_title] => 'High Voltage Diode'
[patent_app_type] => utility
[patent_app_number] => 14/697195
[patent_app_country] => US
[patent_app_date] => 2015-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8476
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14697195
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/697195 | High voltage diode | Apr 26, 2015 | Issued |
Array
(
[id] => 11645280
[patent_doc_number] => 09666674
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-30
[patent_title] => 'Formation of large scale single crystalline graphene'
[patent_app_type] => utility
[patent_app_number] => 14/691270
[patent_app_country] => US
[patent_app_date] => 2015-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 6315
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14691270
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/691270 | Formation of large scale single crystalline graphene | Apr 19, 2015 | Issued |
Array
(
[id] => 10610962
[patent_doc_number] => 09331004
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-03
[patent_title] => 'Magnetically coupled galvanically isolated communication using lead frame'
[patent_app_type] => utility
[patent_app_number] => 14/688257
[patent_app_country] => US
[patent_app_date] => 2015-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 9149
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688257
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/688257 | Magnetically coupled galvanically isolated communication using lead frame | Apr 15, 2015 | Issued |
Array
(
[id] => 10321967
[patent_doc_number] => 20150206971
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-23
[patent_title] => 'Hybrid Fin Field-Effect Transistor Structures and Related Methods'
[patent_app_type] => utility
[patent_app_number] => 14/671729
[patent_app_country] => US
[patent_app_date] => 2015-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 15847
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14671729
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/671729 | Hybrid fin field-effect transistor structures and related methods | Mar 26, 2015 | Issued |
Array
(
[id] => 10302645
[patent_doc_number] => 20150187644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-02
[patent_title] => 'SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/656372
[patent_app_country] => US
[patent_app_date] => 2015-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 14368
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656372
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/656372 | Semiconductor device with air gap and method of fabricating the same | Mar 11, 2015 | Issued |
Array
(
[id] => 11551794
[patent_doc_number] => 09620656
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-11
[patent_title] => 'Semiconductor device having a transparent window for passing radiation'
[patent_app_type] => utility
[patent_app_number] => 14/639334
[patent_app_country] => US
[patent_app_date] => 2015-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 5458
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639334
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/639334 | Semiconductor device having a transparent window for passing radiation | Mar 4, 2015 | Issued |
Array
(
[id] => 10370515
[patent_doc_number] => 20150255520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-10
[patent_title] => 'Light-Emitting Element, Light-Emitting Device, Electronic Device, and Lighting Device'
[patent_app_type] => utility
[patent_app_number] => 14/639394
[patent_app_country] => US
[patent_app_date] => 2015-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 14609
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639394
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/639394 | Light-emitting element, light-emitting device, electronic device, and lighting device | Mar 4, 2015 | Issued |
Array
(
[id] => 12229742
[patent_doc_number] => 09916991
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-13
[patent_title] => 'Semiconductor device with recess and method of making'
[patent_app_type] => utility
[patent_app_number] => 14/639588
[patent_app_country] => US
[patent_app_date] => 2015-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 74
[patent_figures_cnt] => 74
[patent_no_of_words] => 30121
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639588
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/639588 | Semiconductor device with recess and method of making | Mar 4, 2015 | Issued |
Array
(
[id] => 10747568
[patent_doc_number] => 20160093719
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-31
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/639520
[patent_app_country] => US
[patent_app_date] => 2015-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 9124
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639520
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/639520 | Power semiconductor device with electrode having trench structure | Mar 4, 2015 | Issued |