Search

Willie L Davis

Examiner (ID: 5098)

Most Active Art Unit
2877
Art Unit(s)
2877
Total Applications
12
Issued Applications
10
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10028775 [patent_doc_number] => 09070684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Integrated circuit power grid with improved routing resources and bypass capacitance' [patent_app_type] => utility [patent_app_number] => 13/460291 [patent_app_country] => US [patent_app_date] => 2012-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5517 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13460291 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/460291
Integrated circuit power grid with improved routing resources and bypass capacitance Apr 29, 2012 Issued
Array ( [id] => 9376333 [patent_doc_number] => 08680598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Trench structure and method of forming the trench structure' [patent_app_type] => utility [patent_app_number] => 13/455177 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 13625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13455177 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/455177
Trench structure and method of forming the trench structure Apr 24, 2012 Issued
Array ( [id] => 9428303 [patent_doc_number] => 08704383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Silicon-based thin substrate and packaging schemes' [patent_app_type] => utility [patent_app_number] => 13/452562 [patent_app_country] => US [patent_app_date] => 2012-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3242 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13452562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/452562
Silicon-based thin substrate and packaging schemes Apr 19, 2012 Issued
Array ( [id] => 8321356 [patent_doc_number] => 20120193767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'ADVANCED LOW k CAP FILM FORMATION PROCESS FOR NANO ELECTRONIC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/444405 [patent_app_country] => US [patent_app_date] => 2012-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13444405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/444405
ADVANCED LOW k CAP FILM FORMATION PROCESS FOR NANO ELECTRONIC DEVICES Apr 10, 2012 Abandoned
Array ( [id] => 9344962 [patent_doc_number] => 08664109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Advanced low k cap film formation process for nano electronic devices' [patent_app_type] => utility [patent_app_number] => 13/444415 [patent_app_country] => US [patent_app_date] => 2012-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 6893 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13444415 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/444415
Advanced low k cap film formation process for nano electronic devices Apr 10, 2012 Issued
Array ( [id] => 10060297 [patent_doc_number] => 09099661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-04 [patent_title] => 'OFET including PVDF-TRFE-CFE dielectric' [patent_app_type] => utility [patent_app_number] => 14/110022 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 7516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14110022 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/110022
OFET including PVDF-TRFE-CFE dielectric Apr 4, 2012 Issued
Array ( [id] => 8287441 [patent_doc_number] => 20120175771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'Semiconductor Device and Method of Forming No-Flow Underfill Material Around Vertical Interconnect Structure' [patent_app_type] => utility [patent_app_number] => 13/423782 [patent_app_country] => US [patent_app_date] => 2012-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5862 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13423782 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/423782
Semiconductor device and method of forming no-flow underfill material around vertical interconnect structure Mar 18, 2012 Issued
Array ( [id] => 8206230 [patent_doc_number] => 20120126900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/362076 [patent_app_country] => US [patent_app_date] => 2012-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6919 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20120126900.pdf [firstpage_image] =>[orig_patent_app_number] => 13362076 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/362076
Semiconductor device Jan 30, 2012 Issued
Array ( [id] => 9627140 [patent_doc_number] => 08796825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Materials, structures and methods for microelectronic packaging' [patent_app_type] => utility [patent_app_number] => 13/353217 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8585 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13353217 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/353217
Materials, structures and methods for microelectronic packaging Jan 17, 2012 Issued
Array ( [id] => 8180203 [patent_doc_number] => 20120112328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'Semiconductor Device and Method of Mounting Pre-Fabricated Shielding Frame over Semiconductor Die' [patent_app_type] => utility [patent_app_number] => 13/350692 [patent_app_country] => US [patent_app_date] => 2012-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5807 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112328.pdf [firstpage_image] =>[orig_patent_app_number] => 13350692 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/350692
Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die Jan 12, 2012 Issued
Array ( [id] => 8094945 [patent_doc_number] => 20120083076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'Ultra-Shallow Junction MOSFET Having a High-k Gate Dielectric and In-Situ Doped Selective Epitaxy Source/Drain Extensions and a Method of Making Same' [patent_app_type] => utility [patent_app_number] => 13/324592 [patent_app_country] => US [patent_app_date] => 2011-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6134 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20120083076.pdf [firstpage_image] =>[orig_patent_app_number] => 13324592 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/324592
Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same Dec 12, 2011 Issued
Array ( [id] => 8049593 [patent_doc_number] => 20120074530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'INTERPOSER INCLUDING AIR GAP STRUCTURE, METHODS OF FORMING THE SAME, SEMICONDUCTOR DEVICE INCLUDING THE INTERPOSER, AND MULTI-CHIP PACKAGE INCLUDING THE INTERPOSER' [patent_app_type] => utility [patent_app_number] => 13/299808 [patent_app_country] => US [patent_app_date] => 2011-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4377 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074530.pdf [firstpage_image] =>[orig_patent_app_number] => 13299808 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/299808
INTERPOSER INCLUDING AIR GAP STRUCTURE, METHODS OF FORMING THE SAME, SEMICONDUCTOR DEVICE INCLUDING THE INTERPOSER, AND MULTI-CHIP PACKAGE INCLUDING THE INTERPOSER Nov 17, 2011 Abandoned
Array ( [id] => 8528220 [patent_doc_number] => 08304794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Light emitting device' [patent_app_type] => utility [patent_app_number] => 13/286108 [patent_app_country] => US [patent_app_date] => 2011-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 35 [patent_no_of_words] => 9761 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286108 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/286108
Light emitting device Oct 30, 2011 Issued
Array ( [id] => 8127637 [patent_doc_number] => 20120088365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'TECHNIQUE FOR FORMING METAL LINES IN A SEMICONDUCTOR BY ADAPTING THE TEMPERATURE DEPENDENCE OF THE LINE RESISTANCE' [patent_app_type] => utility [patent_app_number] => 13/272876 [patent_app_country] => US [patent_app_date] => 2011-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9558 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20120088365.pdf [firstpage_image] =>[orig_patent_app_number] => 13272876 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/272876
Technique for forming metal lines in a semiconductor by adapting the temperature dependence of the line resistance Oct 12, 2011 Issued
Array ( [id] => 9350756 [patent_doc_number] => 08669650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-11 [patent_title] => 'Flip chip semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/244256 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 4947 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13244256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/244256
Flip chip semiconductor device Sep 22, 2011 Issued
Array ( [id] => 9667925 [patent_doc_number] => 20140231788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'DIGITIZED OLED LIGHT SOURCE' [patent_app_type] => utility [patent_app_number] => 14/346561 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 38517 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14346561 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/346561
Digitized OLED light source Sep 22, 2011 Issued
Array ( [id] => 8422274 [patent_doc_number] => 08278763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/238796 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 18459 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13238796 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/238796
Semiconductor device Sep 20, 2011 Issued
Array ( [id] => 8859155 [patent_doc_number] => 08461692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Semiconductor device structures including damascene trenches with conductive structures and related method' [patent_app_type] => utility [patent_app_number] => 13/237447 [patent_app_country] => US [patent_app_date] => 2011-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7560 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13237447 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/237447
Semiconductor device structures including damascene trenches with conductive structures and related method Sep 19, 2011 Issued
Array ( [id] => 9184440 [patent_doc_number] => 08624378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Chip-housing module and a method for forming a chip-housing module' [patent_app_type] => utility [patent_app_number] => 13/223441 [patent_app_country] => US [patent_app_date] => 2011-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7540 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13223441 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/223441
Chip-housing module and a method for forming a chip-housing module Aug 31, 2011 Issued
Array ( [id] => 8462474 [patent_doc_number] => 20120267642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'Nitride semicondutor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/137311 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13137311 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137311
Semicondutor device Aug 3, 2011 Issued
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