Search

Willie L Davis

Examiner (ID: 16130)

Most Active Art Unit
2877
Art Unit(s)
2877
Total Applications
12
Issued Applications
10
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17447830 [patent_doc_number] => 20220068335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => Methods and Systems for Improving Read and Write of Memory Cells [patent_app_type] => utility [patent_app_number] => 17/498919 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498919 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/498919
Methods and Systems for Improving Read and Write of Memory Cells Oct 11, 2021 Pending
Array ( [id] => 18415813 [patent_doc_number] => 11670358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Memory with adjustable TSV delay [patent_app_type] => utility [patent_app_number] => 17/496728 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 7341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496728
Memory with adjustable TSV delay Oct 6, 2021 Issued
Array ( [id] => 17373382 [patent_doc_number] => 20220028434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => DATA RECEIVING DEVICES, MEMORY DEVICES HAVING THE SAME, AND OPERATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 17/495862 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495862 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495862
Data receiving devices, memory devices having the same, and operating methods thereof Oct 6, 2021 Issued
Array ( [id] => 17373411 [patent_doc_number] => 20220028463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/495971 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495971
Memory device for passing verify operation and operating method of the same Oct 6, 2021 Issued
Array ( [id] => 18766766 [patent_doc_number] => 11817173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Timing-based computer architecture systems and methods [patent_app_type] => utility [patent_app_number] => 17/492526 [patent_app_country] => US [patent_app_date] => 2021-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 16653 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492526
Timing-based computer architecture systems and methods Sep 30, 2021 Issued
Array ( [id] => 17402656 [patent_doc_number] => 20220044747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => PROGRAMMABLE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/490535 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490535 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490535
Programmable memory device Sep 29, 2021 Issued
Array ( [id] => 17992940 [patent_doc_number] => 20220358977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => INTEGRATED CIRCUIT AND SEMICONDUCTOR MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/488863 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488863 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488863
Integrated circuit having data output circuit and semiconductor memory system including the same Sep 28, 2021 Issued
Array ( [id] => 18357666 [patent_doc_number] => 11646072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Electronic device for adjusting refresh operation period [patent_app_type] => utility [patent_app_number] => 17/480832 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11751 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480832 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480832
Electronic device for adjusting refresh operation period Sep 20, 2021 Issued
Array ( [id] => 17318535 [patent_doc_number] => 20210407585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/473648 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473648 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473648
Manufacturing method of three-dimensional semiconductor device Sep 12, 2021 Issued
Array ( [id] => 17318509 [patent_doc_number] => 20210407559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => MEMORY DEVICE WITH BUILT-IN FLEXIBLE DOUBLE REDUNDANCY [patent_app_type] => utility [patent_app_number] => 17/472307 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472307 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472307
Memory device with built-in flexible double redundancy Sep 9, 2021 Issued
Array ( [id] => 17416803 [patent_doc_number] => 20220051707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => FIRST IN FIRST OUT MEMORY AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/446984 [patent_app_country] => US [patent_app_date] => 2021-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446984
First in first out memory and memory device Sep 5, 2021 Issued
Array ( [id] => 17302764 [patent_doc_number] => 20210398603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/466160 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466160 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/466160
Memory device with a memory repair mechanism and methods for operating the same Sep 2, 2021 Issued
Array ( [id] => 17676350 [patent_doc_number] => 20220189517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY DEVICES FOR MULTILPLE READ OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/463789 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463789 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463789
Memory devices for multiple read operations Aug 31, 2021 Issued
Array ( [id] => 18222502 [patent_doc_number] => 20230061496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => CONTENT-ADDRESSABLE MEMORY AND ANALOG CONTENT-ADDRESSABLE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/463607 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463607
Content-addressable memory and analog content-addressable memory device Aug 31, 2021 Issued
Array ( [id] => 18239880 [patent_doc_number] => 20230072191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SCALABLE IN SITU DRAM-BASED ACCELERATORS AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/462836 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462836 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/462836
Scalable in situ DRAM-based accelerators and methods of operating the same Aug 30, 2021 Issued
Array ( [id] => 18446858 [patent_doc_number] => 11682433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Multiple stack high voltage circuit for memory [patent_app_type] => utility [patent_app_number] => 17/460938 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 10520 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460938 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460938
Multiple stack high voltage circuit for memory Aug 29, 2021 Issued
Array ( [id] => 18415810 [patent_doc_number] => 11670355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Accelerator controlling memory device, computing system including accelerator, and operating method of accelerator [patent_app_type] => utility [patent_app_number] => 17/406511 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406511 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406511
Accelerator controlling memory device, computing system including accelerator, and operating method of accelerator Aug 18, 2021 Issued
Array ( [id] => 18480982 [patent_doc_number] => 11694733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Acceleration of in-memory-compute arrays [patent_app_type] => utility [patent_app_number] => 17/406817 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406817
Acceleration of in-memory-compute arrays Aug 18, 2021 Issued
Array ( [id] => 17262891 [patent_doc_number] => 20210375876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/402723 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402723 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402723
Semiconductor device comprising first and second conductors Aug 15, 2021 Issued
Array ( [id] => 18401919 [patent_doc_number] => 11664063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Apparatuses and methods for countering memory attacks [patent_app_type] => utility [patent_app_number] => 17/444925 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9002 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444925 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444925
Apparatuses and methods for countering memory attacks Aug 11, 2021 Issued
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