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Willie L Davis

Examiner (ID: 16130)

Most Active Art Unit
2877
Art Unit(s)
2877
Total Applications
12
Issued Applications
10
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18120333 [patent_doc_number] => 11551731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Memory circuit arrangement for accurate and secure read [patent_app_type] => utility [patent_app_number] => 17/321344 [patent_app_country] => US [patent_app_date] => 2021-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10404 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321344 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/321344
Memory circuit arrangement for accurate and secure read May 13, 2021 Issued
Array ( [id] => 17716375 [patent_doc_number] => 11380373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-05 [patent_title] => Memory with read circuit for current-to-voltage slope characteristic-based sensing and method [patent_app_type] => utility [patent_app_number] => 17/317938 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 13374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317938 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317938
Memory with read circuit for current-to-voltage slope characteristic-based sensing and method May 11, 2021 Issued
Array ( [id] => 18120357 [patent_doc_number] => 11551755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Semiconductor device including a content reference memory [patent_app_type] => utility [patent_app_number] => 17/318632 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8173 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318632 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318632
Semiconductor device including a content reference memory May 11, 2021 Issued
Array ( [id] => 18131152 [patent_doc_number] => 11557367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Modifying memory bank operating parameters [patent_app_type] => utility [patent_app_number] => 17/317221 [patent_app_country] => US [patent_app_date] => 2021-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 18620 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317221
Modifying memory bank operating parameters May 10, 2021 Issued
Array ( [id] => 18120341 [patent_doc_number] => 11551739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Dual-precision analog memory cell and array [patent_app_type] => utility [patent_app_number] => 17/308675 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5239 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308675
Dual-precision analog memory cell and array May 4, 2021 Issued
Array ( [id] => 17359606 [patent_doc_number] => 20220020402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => SENSING CIRCUIT AND METHOD FOR MULTI-LEVEL MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/241112 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241112 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241112
Sensing circuit and method for multi-level memory cell Apr 26, 2021 Issued
Array ( [id] => 18131156 [patent_doc_number] => 11557371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Imprint recovery for memory cells [patent_app_type] => utility [patent_app_number] => 17/241893 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 65640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241893 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241893
Imprint recovery for memory cells Apr 26, 2021 Issued
Array ( [id] => 18047704 [patent_doc_number] => 11521662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Write circuit of memory device [patent_app_type] => utility [patent_app_number] => 17/229676 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/229676
Write circuit of memory device Apr 12, 2021 Issued
Array ( [id] => 18155914 [patent_doc_number] => 11568903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Page buffer circuit and memory device including the same [patent_app_type] => utility [patent_app_number] => 17/222024 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 17166 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222024
Page buffer circuit and memory device including the same Apr 4, 2021 Issued
Array ( [id] => 17917191 [patent_doc_number] => 20220319587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => Identify the Programming Mode of Memory Cells based on Cell Statistics Obtained during Reading of the Memory Cells [patent_app_type] => utility [patent_app_number] => 17/221417 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221417
Identify the programming mode of memory cells based on cell statistics obtained during reading of the memory cells Apr 1, 2021 Issued
Array ( [id] => 17917189 [patent_doc_number] => 20220319585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => Wordline Driver Architecture [patent_app_type] => utility [patent_app_number] => 17/218949 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218949 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218949
Wordline driver architecture Mar 30, 2021 Issued
Array ( [id] => 17847708 [patent_doc_number] => 11437092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Systems and methods to store multi-level data [patent_app_type] => utility [patent_app_number] => 17/203890 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 9119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203890
Systems and methods to store multi-level data Mar 16, 2021 Issued
Array ( [id] => 17870416 [patent_doc_number] => 20220293153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SYSTEMS AND METHODS FOR ADAPTIVE WRITE TRAINING OF THREE DIMENSIONAL MEMORY [patent_app_type] => utility [patent_app_number] => 17/200293 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200293
Systems and methods for adaptive write training of three dimensional memory Mar 11, 2021 Issued
Array ( [id] => 17099953 [patent_doc_number] => 20210287744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => RESTORING MEMORY CELL THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 17/196638 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196638
Restoring memory cell threshold voltages Mar 8, 2021 Issued
Array ( [id] => 17908391 [patent_doc_number] => 11462251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor device capable of performing an auto-precharge operation [patent_app_type] => utility [patent_app_number] => 17/195294 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8499 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195294 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195294
Semiconductor device capable of performing an auto-precharge operation Mar 7, 2021 Issued
Array ( [id] => 18190444 [patent_doc_number] => 11581045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Page buffer circuit with bit line select transistor [patent_app_type] => utility [patent_app_number] => 17/190691 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7053 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190691 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190691
Page buffer circuit with bit line select transistor Mar 2, 2021 Issued
Array ( [id] => 18000728 [patent_doc_number] => 11501839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Memory system configured to determine a write voltage applied to memory cells based on the number of erase operations [patent_app_type] => utility [patent_app_number] => 17/190125 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 14513 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190125 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190125
Memory system configured to determine a write voltage applied to memory cells based on the number of erase operations Mar 1, 2021 Issued
Array ( [id] => 17978401 [patent_doc_number] => 11495273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Write circuit, non-volatile data storage, method for writing to a plurality of memory cells and method for operating a non-volatile data memory [patent_app_type] => utility [patent_app_number] => 17/188164 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5731 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188164
Write circuit, non-volatile data storage, method for writing to a plurality of memory cells and method for operating a non-volatile data memory Feb 28, 2021 Issued
Array ( [id] => 17716379 [patent_doc_number] => 11380377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Method for writing data in a memory of a contactless transponder, and corresponding contactless transponder device [patent_app_type] => utility [patent_app_number] => 17/188569 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6128 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188569 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188569
Method for writing data in a memory of a contactless transponder, and corresponding contactless transponder device Feb 28, 2021 Issued
Array ( [id] => 17683208 [patent_doc_number] => 11367468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-21 [patent_title] => Sense amplifier [patent_app_type] => utility [patent_app_number] => 17/186250 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11663 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186250
Sense amplifier Feb 25, 2021 Issued
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