| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 4805993
[patent_doc_number] => 20080169571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-17
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/014858
[patent_app_country] => US
[patent_app_date] => 2008-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 8976
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20080169571.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014858
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014858 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Jan 15, 2008 | Abandoned |
Array
(
[id] => 4843285
[patent_doc_number] => 20080179693
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-31
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/014370
[patent_app_country] => US
[patent_app_date] => 2008-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9769
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20080179693.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014370
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014370 | Semiconductor device having vertical transistor formed on an active pattern protruding from a substrate | Jan 14, 2008 | Issued |
Array
(
[id] => 4762685
[patent_doc_number] => 20080173894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/014449
[patent_app_country] => US
[patent_app_date] => 2008-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2917
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20080173894.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014449
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014449 | Bi-directional semiconductor ESD protection device | Jan 14, 2008 | Issued |
Array
(
[id] => 4952581
[patent_doc_number] => 20080185605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-07
[patent_title] => 'LIGHT-EMITTING DIODE AND METHOD FOR PRODUCING IT'
[patent_app_type] => utility
[patent_app_number] => 12/014568
[patent_app_country] => US
[patent_app_date] => 2008-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3912
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20080185605.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014568
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014568 | Method to produce reflector with an outer peripheral edge portion of an upper surface uncovered by a reflection film and to produce a lightemitting device using the same reflector | Jan 14, 2008 | Issued |
Array
(
[id] => 4441613
[patent_doc_number] => 07927887
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-19
[patent_title] => 'Method of fabricating a dielectric-modulated field effect transistor comprising a biomolecules layer formed in a space where a sacrificial layer has been removed'
[patent_app_type] => utility
[patent_app_number] => 12/014380
[patent_app_country] => US
[patent_app_date] => 2008-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5778
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/927/07927887.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014380
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014380 | Method of fabricating a dielectric-modulated field effect transistor comprising a biomolecules layer formed in a space where a sacrificial layer has been removed | Jan 14, 2008 | Issued |
Array
(
[id] => 4762812
[patent_doc_number] => 20080174021
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'SEMICONDUCTOR DEVICES HAVING METAL INTERCONNECTIONS, SEMICONDUCTOR CLUSTER TOOLS USED IN FABRICATION THEREOF AND METHODS OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/014458
[patent_app_country] => US
[patent_app_date] => 2008-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7202
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20080174021.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014458
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014458 | SEMICONDUCTOR DEVICES HAVING METAL INTERCONNECTIONS, SEMICONDUCTOR CLUSTER TOOLS USED IN FABRICATION THEREOF AND METHODS OF FABRICATING THE SAME | Jan 14, 2008 | Abandoned |
Array
(
[id] => 8871130
[patent_doc_number] => 08466509
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-18
[patent_title] => 'Semiconductor device having a contact plug connecting to a silicide film formed on a diffusion region of a flash memory cell'
[patent_app_type] => utility
[patent_app_number] => 12/013709
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 6284
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 309
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12013709
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013709 | Semiconductor device having a contact plug connecting to a silicide film formed on a diffusion region of a flash memory cell | Jan 13, 2008 | Issued |
Array
(
[id] => 5340678
[patent_doc_number] => 20090179328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-16
[patent_title] => 'BARRIER SEQUENCE FOR USE IN COPPER INTERCONNECT METALLIZATION'
[patent_app_type] => utility
[patent_app_number] => 12/013649
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2469
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20090179328.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013649
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013649 | BARRIER SEQUENCE FOR USE IN COPPER INTERCONNECT METALLIZATION | Jan 13, 2008 | Abandoned |
Array
(
[id] => 4843353
[patent_doc_number] => 20080179761
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-31
[patent_title] => 'SEMICONDUCTOR PACKAGE HAVING EVAPORATED SYMBOLIZATION'
[patent_app_type] => utility
[patent_app_number] => 12/013599
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3715
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20080179761.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013599
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013599 | SEMICONDUCTOR PACKAGE HAVING EVAPORATED SYMBOLIZATION | Jan 13, 2008 | Abandoned |
Array
(
[id] => 4737228
[patent_doc_number] => 20080230880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'Leadframe Array with Riveted Heat Sinks'
[patent_app_type] => utility
[patent_app_number] => 12/013738
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2954
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0230/20080230880.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013738
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013738 | Leadframe Array with Riveted Heat Sinks | Jan 13, 2008 | Abandoned |
Array
(
[id] => 4789505
[patent_doc_number] => 20080290478
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-27
[patent_title] => 'LEAD-FRAME ARRAY PACKAGE STRUCTURE AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/013908
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3422
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20080290478.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013908
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013908 | LEAD-FRAME ARRAY PACKAGE STRUCTURE AND METHOD | Jan 13, 2008 | Abandoned |
Array
(
[id] => 4737195
[patent_doc_number] => 20080230847
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/014078
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 20746
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0230/20080230847.pdf
[firstpage_image] =>[orig_patent_app_number] => 12014078
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/014078 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME | Jan 13, 2008 | Abandoned |
Array
(
[id] => 133741
[patent_doc_number] => 07696521
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-13
[patent_title] => 'Organic light emitting diode display device having first and second capacitors disposed on a substrate wherein the first capacitor comprises an undoped semiconductor layer electrode.'
[patent_app_type] => utility
[patent_app_number] => 12/013698
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4405
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/696/07696521.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013698
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013698 | Organic light emitting diode display device having first and second capacitors disposed on a substrate wherein the first capacitor comprises an undoped semiconductor layer electrode. | Jan 13, 2008 | Issued |
Array
(
[id] => 5340600
[patent_doc_number] => 20090179250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-16
[patent_title] => 'Memory Device'
[patent_app_type] => utility
[patent_app_number] => 12/013969
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6309
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20090179250.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013969
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013969 | Memory device having cross-shaped semiconductor fin structure | Jan 13, 2008 | Issued |
Array
(
[id] => 83445
[patent_doc_number] => 07741176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-22
[patent_title] => 'Method for fabricating a cylindrical capacitor including implanting impurities into the upper sections of the lower electrode to prevent the formation of hemispherical grain silicon on the upper sections'
[patent_app_type] => utility
[patent_app_number] => 12/013509
[patent_app_country] => US
[patent_app_date] => 2008-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2843
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 300
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/741/07741176.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013509
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013509 | Method for fabricating a cylindrical capacitor including implanting impurities into the upper sections of the lower electrode to prevent the formation of hemispherical grain silicon on the upper sections | Jan 13, 2008 | Issued |
Array
(
[id] => 4843342
[patent_doc_number] => 20080179750
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-31
[patent_title] => 'INTERCONNECTIONS OF AN INTEGRATED ELECTRONIC CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/013279
[patent_app_country] => US
[patent_app_date] => 2008-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4788
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20080179750.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013279
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013279 | INTERCONNECTIONS OF AN INTEGRATED ELECTRONIC CIRCUIT | Jan 10, 2008 | Abandoned |
Array
(
[id] => 4762728
[patent_doc_number] => 20080173937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICES INCLUDING VERTICALLY ORIENTED TRANSISTORS AND METHODS OF MANUFACTURING SUCH DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/013069
[patent_app_country] => US
[patent_app_date] => 2008-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10001
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20080173937.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013069
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013069 | SEMICONDUCTOR MEMORY DEVICES INCLUDING VERTICALLY ORIENTED TRANSISTORS AND METHODS OF MANUFACTURING SUCH DEVICES | Jan 10, 2008 | Abandoned |
Array
(
[id] => 4963094
[patent_doc_number] => 20080105914
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'TITANIUM OXIDE EXTENDED GATE FIELD EFFECT TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 12/013299
[patent_app_country] => US
[patent_app_date] => 2008-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2817
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0105/20080105914.pdf
[firstpage_image] =>[orig_patent_app_number] => 12013299
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/013299 | TITANIUM OXIDE EXTENDED GATE FIELD EFFECT TRANSISTOR | Jan 10, 2008 | Abandoned |
Array
(
[id] => 5499242
[patent_doc_number] => 20090159930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'High electron mobility transistor having self-aligned miniature field mitigating plate and protective dielectric layer and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/003098
[patent_app_country] => US
[patent_app_date] => 2007-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3681
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20090159930.pdf
[firstpage_image] =>[orig_patent_app_number] => 12003098
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/003098 | High electron mobility transistor having self-aligned miniature field mitigating plate on a protective dielectric layer | Dec 19, 2007 | Issued |
Array
(
[id] => 4749078
[patent_doc_number] => 20080157149
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'CMOS image sensor and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/001649
[patent_app_country] => US
[patent_app_date] => 2007-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2455
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20080157149.pdf
[firstpage_image] =>[orig_patent_app_number] => 12001649
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/001649 | CMOS image sensor and method for manufacturing the same | Dec 10, 2007 | Abandoned |