Willis Little
Examiner (ID: 13674)
Most Active Art Unit | 3203 |
Art Unit(s) | 2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103 |
Total Applications | 2327 |
Issued Applications | 2182 |
Pending Applications | 48 |
Abandoned Applications | 97 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 11043722
[patent_doc_number] => 20160240678
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2016-08-18
[patent_title] => 'STRAINED SEMICONDUCTOR USING ELASTIC EDGE RELAXATION OF A STRESSOR COMBINED WITH BURIED INSULATING LAYER'
[patent_app_type] => utility
[patent_app_number] => 13/762677
[patent_app_country] => US
[patent_app_date] => 2013-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762677
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/762677 | Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer | Feb 7, 2013 | Issued |
Array
(
[id] => 8974206
[patent_doc_number] => 20130207636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-15
[patent_title] => 'REFERENCE VOLTAGE GENERATOR'
[patent_app_type] => utility
[patent_app_number] => 13/755545
[patent_app_country] => US
[patent_app_date] => 2013-01-31
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/755545 | Reference voltage generator | Jan 30, 2013 | Issued |
Array
(
[id] => 13819413
[patent_doc_number] => 10186480
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-22
[patent_title] => Stacked-chip packages in package-on-package apparatus, methods of assembling same, and systems containing same
[patent_app_type] => utility
[patent_app_number] => 13/741382
[patent_app_country] => US
[patent_app_date] => 2013-01-14
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[patent_drawing_sheets_cnt] => 11
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741382
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/741382 | Stacked-chip packages in package-on-package apparatus, methods of assembling same, and systems containing same | Jan 13, 2013 | Issued |
Array
(
[id] => 9482981
[patent_doc_number] => 08728932
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-20
[patent_title] => 'Contact for memory cell'
[patent_app_type] => utility
[patent_app_number] => 13/734476
[patent_app_country] => US
[patent_app_date] => 2013-01-04
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734476
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/734476 | Contact for memory cell | Jan 3, 2013 | Issued |
Array
(
[id] => 8838921
[patent_doc_number] => 20130134549
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-30
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/725389
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[patent_app_date] => 2012-12-21
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725389
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/725389 | Semiconductor device and method for manufacturing the same | Dec 20, 2012 | Issued |
Array
(
[id] => 8956563
[patent_doc_number] => 08502342
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-08-06
[patent_title] => 'Circuits, systems, and methods for reducing effects of cross talk in I/O lines and wire bonds'
[patent_app_type] => utility
[patent_app_number] => 13/684331
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[patent_app_date] => 2012-11-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/684331 | Circuits, systems, and methods for reducing effects of cross talk in I/O lines and wire bonds | Nov 22, 2012 | Issued |
Array
(
[id] => 10858131
[patent_doc_number] => 08884335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-11
[patent_title] => 'Semiconductor including lateral HEMT'
[patent_app_type] => utility
[patent_app_number] => 13/681958
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13681958
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/681958 | Semiconductor including lateral HEMT | Nov 19, 2012 | Issued |
Array
(
[id] => 9171707
[patent_doc_number] => 20130313692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-28
[patent_title] => 'ANTENNA IN PACKAGE WITH REDUCED ELECTROMAGNETIC INTERACTION WITH ON CHIP ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 13/673750
[patent_app_country] => US
[patent_app_date] => 2012-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673750
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/673750 | ANTENNA IN PACKAGE WITH REDUCED ELECTROMAGNETIC INTERACTION WITH ON CHIP ELEMENTS | Nov 8, 2012 | Abandoned |
Array
(
[id] => 10525218
[patent_doc_number] => 09251734
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-02
[patent_title] => 'Pixel circuit, electro-optical device, and electronic apparatus'
[patent_app_type] => utility
[patent_app_number] => 13/669002
[patent_app_country] => US
[patent_app_date] => 2012-11-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/669002 | Pixel circuit, electro-optical device, and electronic apparatus | Nov 4, 2012 | Issued |
Array
(
[id] => 8659599
[patent_doc_number] => 20130040428
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[patent_issue_date] => 2013-02-14
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME'
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[patent_app_number] => 13/653068
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[patent_app_date] => 2012-10-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/653068 | Semiconductor package and method of fabricating the same | Oct 15, 2012 | Issued |
Array
(
[id] => 8697411
[patent_doc_number] => 20130059421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-07
[patent_title] => 'METHOD FOR RADIATION HARDENING AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/629369
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[patent_app_date] => 2012-09-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/629369 | METHOD FOR RADIATION HARDENING AN INTEGRATED CIRCUIT | Sep 26, 2012 | Abandoned |
Array
(
[id] => 10145170
[patent_doc_number] => 09177986
[patent_country] => US
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[patent_issue_date] => 2015-11-03
[patent_title] => 'Isolation for semiconductor devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/598275 | Isolation for semiconductor devices | Aug 28, 2012 | Issued |
Array
(
[id] => 11301107
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[patent_title] => 'Optical cladding layer design'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/597701 | Optical cladding layer design | Aug 28, 2012 | Issued |
Array
(
[id] => 8683309
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[patent_title] => 'TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/593768 | TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL | Aug 23, 2012 | Abandoned |
Array
(
[id] => 8683310
[patent_doc_number] => 20130051594
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[patent_title] => 'TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL'
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Array
(
[id] => 9327873
[patent_doc_number] => 20140054655
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[patent_title] => 'SEMICONDUCTOR GATE STRUCTURE AND METHOD OF FABRICATING THEREOF'
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[patent_app_number] => 13/594100
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/594100 | Semiconductor gate structure and method of fabricating thereof | Aug 23, 2012 | Issued |
Array
(
[id] => 9995772
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[patent_title] => 'Latch-up immunity nLDMOS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590561 | Latch-up immunity nLDMOS | Aug 20, 2012 | Issued |
Array
(
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[patent_title] => 'MULTI-FIN FINFET DEVICE INCLUDING EPITAXIAL GROWTH BARRIER ON OUTSIDE SURFACES OF OUTERMOST FINS AND RELATED METHODS'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/590079 | Semiconductor device having auxiliary patterns | Aug 19, 2012 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/588469 | Solid-state imaging device and electronic apparatus | Aug 16, 2012 | Issued |