Willis Little
Examiner (ID: 13674)
Most Active Art Unit | 3203 |
Art Unit(s) | 2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103 |
Total Applications | 2327 |
Issued Applications | 2182 |
Pending Applications | 48 |
Abandoned Applications | 97 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
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[patent_doc_number] => 20140015095
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[patent_title] => 'Dual Anti-Fuse'
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[patent_app_number] => 13/548123
[patent_app_country] => US
[patent_app_date] => 2012-07-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/548123 | Dual anti-fuse | Jul 11, 2012 | Issued |
Array
(
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[patent_doc_number] => 09627582
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[patent_issue_date] => 2017-04-18
[patent_title] => 'Light-emitting diode architectures for enhanced performance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/536276 | Light-emitting diode architectures for enhanced performance | Jun 27, 2012 | Issued |
Array
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[patent_issue_date] => 2015-11-10
[patent_title] => 'Semiconductor devices with integrated hole collectors'
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Array
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[patent_issue_date] => 2012-10-18
[patent_title] => 'MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/533499 | Monolayer dopant embedded stressor for advanced CMOS | Jun 25, 2012 | Issued |
Array
(
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[patent_issue_date] => 2013-12-26
[patent_title] => 'Methods and Apparatus for Increased Holding Voltage in Silicon Controlled Rectifiers for ESD Protection'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/527833 | Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection | Jun 19, 2012 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/527608 | Semiconductor device and manufacturing method thereof | Jun 19, 2012 | Issued |
Array
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[id] => 9259851
[patent_doc_number] => 20130341780
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[patent_title] => 'CHIP ARRANGEMENTS AND A METHOD FOR FORMING A CHIP ARRANGEMENT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/527668 | CHIP ARRANGEMENTS AND A METHOD FOR FORMING A CHIP ARRANGEMENT | Jun 19, 2012 | Abandoned |
Array
(
[id] => 10015853
[patent_doc_number] => 09058873
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[patent_issue_date] => 2015-06-16
[patent_title] => 'Memory element having ion source layers with different contents of a chalcogen element'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/527764 | Memory element having ion source layers with different contents of a chalcogen element | Jun 19, 2012 | Issued |
Array
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[patent_title] => 'METHOD FOR BONDING LED WAFER, METHOD FOR MANUFACTURING LED CHIP AND BONDING STRUCTURE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/527318 | METHOD FOR BONDING LED WAFER, METHOD FOR MANUFACTURING LED CHIP AND BONDING STRUCTURE | Jun 18, 2012 | Abandoned |
Array
(
[id] => 9195377
[patent_doc_number] => 20130334692
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[patent_title] => 'Bonding Package components Through Plating'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/527422 | Bonding package components through plating | Jun 18, 2012 | Issued |
Array
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[id] => 8563608
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/470024 | Display substrate having sub pixel electrodes connected with thin film transistors, method of manufacturing the same, and display apparatus having the same | May 10, 2012 | Issued |
Array
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[id] => 8368227
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Array
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Array
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Array
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