Willis Little

Array ( [id] => 8730354 [patent_doc_number] => 20130075923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/243555 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9711490 [patent_doc_number] => 08836066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-16 [patent_title] => 'Avalanche photodiode configured for an image sensor' [patent_app_type] => utility [patent_app_number] => 13/243564 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3763 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243564 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10838571 [patent_doc_number] => 08866252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Power semiconductor devices and fabrication methods' [patent_app_type] => utility [patent_app_number] => 13/233672 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 8303 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233672 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7669633 [patent_doc_number] => 20110318902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'METHODS OF FABRICATING FLASH MEMORY DEVICES HAVING SHARED SUB ACTIVE REGIONS' [patent_app_type] => utility [patent_app_number] => 13/230978 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5781 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13230978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9468860 [patent_doc_number] => 08722490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling and device thus obtained' [patent_app_type] => utility [patent_app_number] => 13/219491 [patent_app_country] => US [patent_app_date] => 2011-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 5649 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13219491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7750332 [patent_doc_number] => 20120025227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'WATER RESISTANT SURFACE MOUNT DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/192293 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10184 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025227.pdf [firstpage_image] =>[orig_patent_app_number] => 13192293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7510953 [patent_doc_number] => 20110256663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'High Speed, High Density, Low Power Die Interconnect System' [patent_app_type] => utility [patent_app_number] => 13/169353 [patent_app_country] => US [patent_app_date] => 2011-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 19514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20110256663.pdf [firstpage_image] =>[orig_patent_app_number] => 13169353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7506833 [patent_doc_number] => 20110254162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'High Speed, High Density, Low Power Die Interconnect System' [patent_app_type] => utility [patent_app_number] => 13/169384 [patent_app_country] => US [patent_app_date] => 2011-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 19517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254162.pdf [firstpage_image] =>[orig_patent_app_number] => 13169384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9621360 [patent_doc_number] => 08791534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Magnetic memory device and magnetic memory' [patent_app_type] => utility [patent_app_number] => 13/806828 [patent_app_country] => US [patent_app_date] => 2011-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 44 [patent_no_of_words] => 10736 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13806828 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8071601 [patent_doc_number] => 20110241221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'SEMICONDUCTOR DEVICE WITH IMPROVED RESIN CONFIGURATION' [patent_app_type] => utility [patent_app_number] => 13/159668 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3659 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241221.pdf [firstpage_image] =>[orig_patent_app_number] => 13159668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8960810 [patent_doc_number] => 20130200412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'OPTOELECTRONIC SEMICONDUCTOR COMPONENT' [patent_app_type] => utility [patent_app_number] => 13/703127 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4914 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13703127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8846689 [patent_doc_number] => 08455873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Electronics device, semiconductor device, and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/150614 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 33 [patent_no_of_words] => 13148 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13150614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7489053 [patent_doc_number] => 20110237059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Non-volatile memory devices with multiple layers having band gap relationships among the layers' [patent_app_type] => utility [patent_app_number] => 13/067405 [patent_app_country] => US [patent_app_date] => 2011-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7789 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20110237059.pdf [firstpage_image] =>[orig_patent_app_number] => 13067405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9576016 [patent_doc_number] => 08766433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Electronic chip having channels through which a heat transport coolant can flow, electronic components and communication arm incorporating said chip' [patent_app_type] => utility [patent_app_number] => 13/700918 [patent_app_country] => US [patent_app_date] => 2011-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 30 [patent_no_of_words] => 12914 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13700918 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9079130 [patent_doc_number] => 20130264660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'MICROMECHANICAL SUBSTRATE FOR A DIAPHRAGM WITH A DIFFUSION BARRIER LAYER' [patent_app_type] => utility [patent_app_number] => 13/877316 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4405 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9990200 [patent_doc_number] => 09035406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-19 [patent_title] => 'Wafer level optical packaging system, and associated method of aligning optical wafers' [patent_app_type] => utility [patent_app_number] => 13/113857 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 38 [patent_no_of_words] => 10221 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13113857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5932577 [patent_doc_number] => 20110210449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'INTERCONNECT STRUCTURES INCORPORATING AIR-GAP SPACERS' [patent_app_type] => utility [patent_app_number] => 13/089958 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4931 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210449.pdf [firstpage_image] =>[orig_patent_app_number] => 13089958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8630418 [patent_doc_number] => 08362491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Liquid crystal display device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/083954 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 6013 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13083954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5932575 [patent_doc_number] => 20110210448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'Interconnect Structures Incorporating Air-Gap Spacers' [patent_app_type] => utility [patent_app_number] => 13/083550 [patent_app_country] => US [patent_app_date] => 2011-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4987 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210448.pdf [firstpage_image] =>[orig_patent_app_number] => 13083550 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8468835 [patent_doc_number] => 08298011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Semiconductor device and semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 13/080794 [patent_app_country] => US [patent_app_date] => 2011-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 45 [patent_no_of_words] => 11279 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13080794 [rel_patent_id] =>[rel_patent_doc_number] =>)