Willis Little

Array ( [id] => 8876370 [patent_doc_number] => 08471337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Integrated circuit' [patent_app_type] => utility [patent_app_number] => 13/073755 [patent_app_country] => US [patent_app_date] => 2011-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13073755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8797592 [patent_doc_number] => 08436464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Hollow sealing structure and manufacturing method for hollow sealing structure' [patent_app_type] => utility [patent_app_number] => 13/041562 [patent_app_country] => US [patent_app_date] => 2011-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 3845 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13041562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7654758 [patent_doc_number] => 20110304027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'SEMICONDUCTOR CHIP WITH THROUGH ELECTRODES AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/036372 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5955 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0304/20110304027.pdf [firstpage_image] =>[orig_patent_app_number] => 13036372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9620785 [patent_doc_number] => 08790958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Quantum dot organic light emitting device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/037009 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3911 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13037009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8368173 [patent_doc_number] => 20120217561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'Structure And Method For Adjusting Threshold Voltage Of The Array Of Transistors' [patent_app_type] => utility [patent_app_number] => 13/036243 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 16138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13036243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8368216 [patent_doc_number] => 20120217610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'Bonded Semiconductor Structure With Pyramid-Shaped Alignment Openings and Projections' [patent_app_type] => utility [patent_app_number] => 13/037281 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5755 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13037281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7805245 [patent_doc_number] => 20120056197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'SEMICONDUCTOR RECTIFYING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/036940 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20120056197.pdf [firstpage_image] =>[orig_patent_app_number] => 13036940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8368246 [patent_doc_number] => 20120217633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/036897 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2759 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13036897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7699511 [patent_doc_number] => 20110227079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'THIN FILM TRANSISTOR, DISPLAY DEVICE THEREOF, AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/036241 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7410 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20110227079.pdf [firstpage_image] =>[orig_patent_app_number] => 13036241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10850957 [patent_doc_number] => 08877636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-04 [patent_title] => 'Processing of nanostructured devices using microfabrication techniques' [patent_app_type] => utility [patent_app_number] => 13/036887 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 38 [patent_no_of_words] => 19843 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13036887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10844402 [patent_doc_number] => 08871576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Silicon nanotube MOSFET' [patent_app_type] => utility [patent_app_number] => 13/036292 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 3924 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13036292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5932501 [patent_doc_number] => 20110210425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'FORMATION OF GROUP III-V MATERIAL LAYERS ON PATTERNED SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/036261 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210425.pdf [firstpage_image] =>[orig_patent_app_number] => 13036261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9832413 [patent_doc_number] => 08941232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Metal bumps for cooling device connection' [patent_app_type] => utility [patent_app_number] => 13/034263 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 4877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13034263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5932234 [patent_doc_number] => 20110210339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/034278 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 19879 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210339.pdf [firstpage_image] =>[orig_patent_app_number] => 13034278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6208346 [patent_doc_number] => 20110133270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'MEMORY DEVICE WITH RECESSED CONSTRUCTION BETWEEN MEMORY CONSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 13/025047 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133270.pdf [firstpage_image] =>[orig_patent_app_number] => 13025047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6208346 [patent_doc_number] => 20110133270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'MEMORY DEVICE WITH RECESSED CONSTRUCTION BETWEEN MEMORY CONSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 13/025047 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133270.pdf [firstpage_image] =>[orig_patent_app_number] => 13025047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6208346 [patent_doc_number] => 20110133270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'MEMORY DEVICE WITH RECESSED CONSTRUCTION BETWEEN MEMORY CONSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 13/025047 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133270.pdf [firstpage_image] =>[orig_patent_app_number] => 13025047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6208346 [patent_doc_number] => 20110133270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'MEMORY DEVICE WITH RECESSED CONSTRUCTION BETWEEN MEMORY CONSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 13/025047 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133270.pdf [firstpage_image] =>[orig_patent_app_number] => 13025047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7660145 [patent_doc_number] => 20110309414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'Diode polarity for diode array' [patent_app_type] => utility [patent_app_number] => 12/930655 [patent_app_country] => US [patent_app_date] => 2011-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3294 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20110309414.pdf [firstpage_image] =>[orig_patent_app_number] => 12930655 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8287341 [patent_doc_number] => 20120175672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'ESD PROTECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/986970 [patent_app_country] => US [patent_app_date] => 2011-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12986970 [rel_patent_id] =>[rel_patent_doc_number] =>)