Search

Willis Little

Examiner (ID: 13674)

Most Active Art Unit
3203
Art Unit(s)
2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103
Total Applications
2327
Issued Applications
2182
Pending Applications
48
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4925222 [patent_doc_number] => 20080164585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/962142 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5789 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164585.pdf [firstpage_image] =>[orig_patent_app_number] => 11962142 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962142
Semiconductor device Dec 20, 2007 Issued
Array ( [id] => 5419862 [patent_doc_number] => 20090146316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'FLIP-CHIP ASSEMBLY WITH ORGANIC CHIP CARRIER HAVING MUSHROOM-PLATED SOLDER RESIST OPENING' [patent_app_type] => utility [patent_app_number] => 11/950431 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5037 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146316.pdf [firstpage_image] =>[orig_patent_app_number] => 11950431 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/950431
Flip-chip assembly with organic chip carrier having mushroom-plated solder resist opening Dec 4, 2007 Issued
Array ( [id] => 5561648 [patent_doc_number] => 20090134500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'Structures for Preventing Cross-talk Between Through-Silicon Vias and Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 11/945022 [patent_app_country] => US [patent_app_date] => 2007-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20090134500.pdf [firstpage_image] =>[orig_patent_app_number] => 11945022 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/945022
Structures for preventing cross-talk between through-silicon vias and integrated circuits Nov 25, 2007 Issued
Array ( [id] => 5275571 [patent_doc_number] => 20090127703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'Method and System for Providing a Low-Profile Semiconductor Assembly' [patent_app_type] => utility [patent_app_number] => 11/942782 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3939 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20090127703.pdf [firstpage_image] =>[orig_patent_app_number] => 11942782 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/942782
Method and System for Providing a Low-Profile Semiconductor Assembly Nov 19, 2007 Abandoned
Array ( [id] => 4896936 [patent_doc_number] => 20080116549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-22 [patent_title] => 'TRANSMISSION TYPE PHOTO INTERRUPTER AND MANUFACTURING METHOD FOR SAME' [patent_app_type] => utility [patent_app_number] => 11/940565 [patent_app_country] => US [patent_app_date] => 2007-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5933 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20080116549.pdf [firstpage_image] =>[orig_patent_app_number] => 11940565 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/940565
TRANSMISSION TYPE PHOTO INTERRUPTER AND MANUFACTURING METHOD FOR SAME Nov 14, 2007 Abandoned
Array ( [id] => 4829361 [patent_doc_number] => 20080128855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => ' SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/929802 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 88 [patent_figures_cnt] => 88 [patent_no_of_words] => 30142 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20080128855.pdf [firstpage_image] =>[orig_patent_app_number] => 11929802 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/929802
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING THE SAME Oct 29, 2007 Abandoned
Array ( [id] => 4701859 [patent_doc_number] => 20080061381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING CAPACITOR ELEMENT' [patent_app_type] => utility [patent_app_number] => 11/926321 [patent_app_country] => US [patent_app_date] => 2007-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 61 [patent_no_of_words] => 18945 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20080061381.pdf [firstpage_image] =>[orig_patent_app_number] => 11926321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/926321
Method of manufacturing semiconductor integrated circuit device having capacitor element Oct 28, 2007 Issued
Array ( [id] => 5439300 [patent_doc_number] => 20090090939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'SELF-ASSEMBLED SIDEWALL SPACER' [patent_app_type] => utility [patent_app_number] => 11/869171 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7150 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20090090939.pdf [firstpage_image] =>[orig_patent_app_number] => 11869171 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/869171
Self-assembled sidewall spacer Oct 8, 2007 Issued
Array ( [id] => 4743420 [patent_doc_number] => 20080088021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/868011 [patent_app_country] => US [patent_app_date] => 2007-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3864 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20080088021.pdf [firstpage_image] =>[orig_patent_app_number] => 11868011 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/868011
Semiconductor device including a silicide layer and a dielectric layer Oct 4, 2007 Issued
Array ( [id] => 4654946 [patent_doc_number] => 20080023806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'STRESS-FREE LEAD FRAME' [patent_app_type] => utility [patent_app_number] => 11/868294 [patent_app_country] => US [patent_app_date] => 2007-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1517 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20080023806.pdf [firstpage_image] =>[orig_patent_app_number] => 11868294 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/868294
Stress-free lead frame Oct 4, 2007 Issued
Array ( [id] => 93002 [patent_doc_number] => 07737486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Non-volatile semiconductor storage device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/859142 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5249 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/737/07737486.pdf [firstpage_image] =>[orig_patent_app_number] => 11859142 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859142
Non-volatile semiconductor storage device and method for manufacturing the same Sep 20, 2007 Issued
Array ( [id] => 5268591 [patent_doc_number] => 20090072366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY' [patent_app_type] => utility [patent_app_number] => 11/857402 [patent_app_country] => US [patent_app_date] => 2007-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072366.pdf [firstpage_image] =>[orig_patent_app_number] => 11857402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/857402
Integrated circuit package system with dual connectivity Sep 17, 2007 Issued
Array ( [id] => 5268634 [patent_doc_number] => 20090072409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Interconnect Structures Incorporating Air-Gap Spacers' [patent_app_type] => utility [patent_app_number] => 11/855211 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4977 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072409.pdf [firstpage_image] =>[orig_patent_app_number] => 11855211 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/855211
Interconnect Structures Incorporating Air-Gap Spacers Sep 13, 2007 Abandoned
Array ( [id] => 4795357 [patent_doc_number] => 20080006943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR ELEMENT SURROUNDED BY AN INSULATING MEMBER AND WIRING STRUCTURES ON UPPER AND LOWER SURFACES OF THE SEMICONDUCTOR ELEMENT AND INSULATING MEMBER, AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/853673 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12290 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20080006943.pdf [firstpage_image] =>[orig_patent_app_number] => 11853673 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853673
Semiconductor device including semiconductor element surrounded by an insulating member wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof Sep 10, 2007 Issued
Array ( [id] => 113858 [patent_doc_number] => 07714407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Semiconductor device and method of forming a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/847201 [patent_app_country] => US [patent_app_date] => 2007-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5046 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/714/07714407.pdf [firstpage_image] =>[orig_patent_app_number] => 11847201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/847201
Semiconductor device and method of forming a semiconductor device Aug 28, 2007 Issued
Array ( [id] => 4487281 [patent_doc_number] => 07902588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Nonvolatile semiconductor memory device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/846251 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 41 [patent_no_of_words] => 10029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902588.pdf [firstpage_image] =>[orig_patent_app_number] => 11846251 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/846251
Nonvolatile semiconductor memory device and method for manufacturing the same Aug 27, 2007 Issued
Array ( [id] => 5413554 [patent_doc_number] => 20090039441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'MOSFET WITH METAL GATE ELECTRODE' [patent_app_type] => utility [patent_app_number] => 11/837161 [patent_app_country] => US [patent_app_date] => 2007-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5513 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039441.pdf [firstpage_image] =>[orig_patent_app_number] => 11837161 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/837161
MOSFET WITH METAL GATE ELECTRODE Aug 9, 2007 Abandoned
Array ( [id] => 4648825 [patent_doc_number] => 20080036080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 11/828521 [patent_app_country] => US [patent_app_date] => 2007-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1849 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036080.pdf [firstpage_image] =>[orig_patent_app_number] => 11828521 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/828521
CHIP PACKAGE Jul 25, 2007 Abandoned
Array ( [id] => 7713504 [patent_doc_number] => 08093729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'Electrically conductive interconnect system and method' [patent_app_type] => utility [patent_app_number] => 11/778461 [patent_app_country] => US [patent_app_date] => 2007-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 122 [patent_figures_cnt] => 275 [patent_no_of_words] => 47837 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/093/08093729.pdf [firstpage_image] =>[orig_patent_app_number] => 11778461 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/778461
Electrically conductive interconnect system and method Jul 15, 2007 Issued
Array ( [id] => 5577 [patent_doc_number] => 07812452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Semiconductor device having barrier layer comprised of dissimilar materials, and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/826331 [patent_app_country] => US [patent_app_date] => 2007-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 6621 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/812/07812452.pdf [firstpage_image] =>[orig_patent_app_number] => 11826331 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/826331
Semiconductor device having barrier layer comprised of dissimilar materials, and method for fabricating the same Jul 12, 2007 Issued
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