Willis Little
Examiner (ID: 13674)
Most Active Art Unit | 3203 |
Art Unit(s) | 2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103 |
Total Applications | 2327 |
Issued Applications | 2182 |
Pending Applications | 48 |
Abandoned Applications | 97 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5645843
[patent_doc_number] => 20060131575
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Electronic device and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/225341
[patent_app_country] => US
[patent_app_date] => 2005-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9906
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0131/20060131575.pdf
[firstpage_image] =>[orig_patent_app_number] => 11225341
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/225341 | Electronic device and manufacturing method thereof | Sep 13, 2005 | Abandoned |
Array
(
[id] => 5823754
[patent_doc_number] => 20060060936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-23
[patent_title] => 'Recess gate-type semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/228041
[patent_app_country] => US
[patent_app_date] => 2005-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 6933
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0060/20060060936.pdf
[firstpage_image] =>[orig_patent_app_number] => 11228041
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/228041 | Recess gate-type semiconductor device and method of manufacturing the same | Sep 13, 2005 | Issued |
Array
(
[id] => 243624
[patent_doc_number] => 07589361
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-15
[patent_title] => 'Standard cells, LSI with the standard cells and layout design method for the standard cells'
[patent_app_type] => utility
[patent_app_number] => 11/224042
[patent_app_country] => US
[patent_app_date] => 2005-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 28
[patent_no_of_words] => 17788
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/589/07589361.pdf
[firstpage_image] =>[orig_patent_app_number] => 11224042
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/224042 | Standard cells, LSI with the standard cells and layout design method for the standard cells | Sep 12, 2005 | Issued |
Array
(
[id] => 373669
[patent_doc_number] => 07473973
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-06
[patent_title] => 'Semiconductor device including metal-oxide-silicon field-effect transistor as a trigger circuit'
[patent_app_type] => utility
[patent_app_number] => 11/223131
[patent_app_country] => US
[patent_app_date] => 2005-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4188
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/473/07473973.pdf
[firstpage_image] =>[orig_patent_app_number] => 11223131
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/223131 | Semiconductor device including metal-oxide-silicon field-effect transistor as a trigger circuit | Sep 11, 2005 | Issued |
Array
(
[id] => 5718500
[patent_doc_number] => 20060071273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-06
[patent_title] => 'Semiconductor device including an LDMOS transistor'
[patent_app_type] => utility
[patent_app_number] => 11/222111
[patent_app_country] => US
[patent_app_date] => 2005-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5310
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0071/20060071273.pdf
[firstpage_image] =>[orig_patent_app_number] => 11222111
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/222111 | Semiconductor device including an LDMOS transistor | Sep 8, 2005 | Abandoned |
Array
(
[id] => 570440
[patent_doc_number] => 07465980
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-16
[patent_title] => 'Ferroelectric memory, multivalent data recording method and multivalent data reading method'
[patent_app_type] => utility
[patent_app_number] => 11/220902
[patent_app_country] => US
[patent_app_date] => 2005-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 36
[patent_no_of_words] => 8444
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/465/07465980.pdf
[firstpage_image] =>[orig_patent_app_number] => 11220902
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/220902 | Ferroelectric memory, multivalent data recording method and multivalent data reading method | Sep 7, 2005 | Issued |
Array
(
[id] => 586004
[patent_doc_number] => 07449751
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-11
[patent_title] => 'High voltage operating electrostatic discharge protection device'
[patent_app_type] => utility
[patent_app_number] => 11/222372
[patent_app_country] => US
[patent_app_date] => 2005-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4724
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/449/07449751.pdf
[firstpage_image] =>[orig_patent_app_number] => 11222372
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/222372 | High voltage operating electrostatic discharge protection device | Sep 6, 2005 | Issued |
Array
(
[id] => 5790782
[patent_doc_number] => 20060011914
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-19
[patent_title] => 'Novel conductive elements for thin film transistors used in a flat panel display'
[patent_app_type] => utility
[patent_app_number] => 11/218496
[patent_app_country] => US
[patent_app_date] => 2005-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5084
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0011/20060011914.pdf
[firstpage_image] =>[orig_patent_app_number] => 11218496
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/218496 | Novel conductive elements for thin film transistors used in a flat panel display | Sep 5, 2005 | Abandoned |
Array
(
[id] => 239937
[patent_doc_number] => 07592655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-22
[patent_title] => 'MOS image sensor'
[patent_app_type] => utility
[patent_app_number] => 11/216111
[patent_app_country] => US
[patent_app_date] => 2005-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 29
[patent_no_of_words] => 7237
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/592/07592655.pdf
[firstpage_image] =>[orig_patent_app_number] => 11216111
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/216111 | MOS image sensor | Aug 31, 2005 | Issued |
Array
(
[id] => 5145715
[patent_doc_number] => 20070045769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Semiconductor constructions, memory arrays, electronic systems, and methods of forming semiconductor constructions'
[patent_app_type] => utility
[patent_app_number] => 11/218231
[patent_app_country] => US
[patent_app_date] => 2005-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 7656
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 19
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20070045769.pdf
[firstpage_image] =>[orig_patent_app_number] => 11218231
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/218231 | Semiconductor constructions | Aug 31, 2005 | Issued |
Array
(
[id] => 5898259
[patent_doc_number] => 20060043492
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Ruthenium gate for a lanthanide oxide dielectric layer'
[patent_app_type] => utility
[patent_app_number] => 11/215412
[patent_app_country] => US
[patent_app_date] => 2005-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9677
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20060043492.pdf
[firstpage_image] =>[orig_patent_app_number] => 11215412
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/215412 | Ruthenium layer for a dielectric layer containing a lanthanide oxide | Aug 28, 2005 | Issued |
Array
(
[id] => 5708125
[patent_doc_number] => 20060049469
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-09
[patent_title] => 'Integrated semiconductor circuit comprising a transistor and a strip conductor'
[patent_app_type] => utility
[patent_app_number] => 11/213342
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4229
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20060049469.pdf
[firstpage_image] =>[orig_patent_app_number] => 11213342
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/213342 | Integrated semiconductor circuit comprising a transistor and a strip conductor | Aug 25, 2005 | Issued |
Array
(
[id] => 367011
[patent_doc_number] => 07479696
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-20
[patent_title] => 'Integrated BST microwave tunable devices fabricated on SOI substrate'
[patent_app_type] => utility
[patent_app_number] => 11/212522
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 1374
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/479/07479696.pdf
[firstpage_image] =>[orig_patent_app_number] => 11212522
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/212522 | Integrated BST microwave tunable devices fabricated on SOI substrate | Aug 25, 2005 | Issued |
Array
(
[id] => 23253
[patent_doc_number] => 07800146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-21
[patent_title] => 'Implanted isolation region for imager pixels'
[patent_app_type] => utility
[patent_app_number] => 11/211651
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4591
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/800/07800146.pdf
[firstpage_image] =>[orig_patent_app_number] => 11211651
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/211651 | Implanted isolation region for imager pixels | Aug 25, 2005 | Issued |
Array
(
[id] => 6929057
[patent_doc_number] => 20050280090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-22
[patent_title] => 'Method of fabricating a FinFET'
[patent_app_type] => utility
[patent_app_number] => 11/213231
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3121
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0280/20050280090.pdf
[firstpage_image] =>[orig_patent_app_number] => 11213231
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/213231 | Method of fabricating a FinFET | Aug 25, 2005 | Issued |
Array
(
[id] => 133797
[patent_doc_number] => 07696547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-13
[patent_title] => 'Semiconductor device with burried semiconductor regions'
[patent_app_type] => utility
[patent_app_number] => 11/210681
[patent_app_country] => US
[patent_app_date] => 2005-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 27
[patent_no_of_words] => 10225
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/696/07696547.pdf
[firstpage_image] =>[orig_patent_app_number] => 11210681
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/210681 | Semiconductor device with burried semiconductor regions | Aug 24, 2005 | Issued |
Array
(
[id] => 5796520
[patent_doc_number] => 20060033197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'Power gridding scheme'
[patent_app_type] => utility
[patent_app_number] => 11/203724
[patent_app_country] => US
[patent_app_date] => 2005-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2848
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 26
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20060033197.pdf
[firstpage_image] =>[orig_patent_app_number] => 11203724
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/203724 | Power gridding scheme | Aug 14, 2005 | Issued |
Array
(
[id] => 5588753
[patent_doc_number] => 20060038204
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-23
[patent_title] => 'Solid-state imaging device and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/199992
[patent_app_country] => US
[patent_app_date] => 2005-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6808
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20060038204.pdf
[firstpage_image] =>[orig_patent_app_number] => 11199992
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/199992 | Solid-state imaging device and method for manufacturing the same | Aug 9, 2005 | Abandoned |
Array
(
[id] => 5908997
[patent_doc_number] => 20060125048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Integrated semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/196421
[patent_app_country] => US
[patent_app_date] => 2005-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5212
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20060125048.pdf
[firstpage_image] =>[orig_patent_app_number] => 11196421
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/196421 | Integrated semiconductor device and method of manufacturing the same | Aug 3, 2005 | Abandoned |
Array
(
[id] => 185733
[patent_doc_number] => 07649266
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-19
[patent_title] => 'Method for producing semiconductor chips using thin film technology, and semiconductor chip using thin film technology'
[patent_app_type] => utility
[patent_app_number] => 11/194941
[patent_app_country] => US
[patent_app_date] => 2005-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 5364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/649/07649266.pdf
[firstpage_image] =>[orig_patent_app_number] => 11194941
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/194941 | Method for producing semiconductor chips using thin film technology, and semiconductor chip using thin film technology | Jul 31, 2005 | Issued |