Search

Willis Little

Examiner (ID: 13674)

Most Active Art Unit
3203
Art Unit(s)
2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103
Total Applications
2327
Issued Applications
2182
Pending Applications
48
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6949788 [patent_doc_number] => 20050224882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'LOW TRIGGER VOLTAGE ESD NMOSFET TRIPLE-WELL CMOS DEVICES' [patent_app_type] => utility [patent_app_number] => 10/709041 [patent_app_country] => US [patent_app_date] => 2004-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2769 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224882.pdf [firstpage_image] =>[orig_patent_app_number] => 10709041 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709041
LOW TRIGGER VOLTAGE ESD NMOSFET TRIPLE-WELL CMOS DEVICES Apr 7, 2004 Abandoned
Array ( [id] => 7403939 [patent_doc_number] => 20040175586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Conformal thin films over textured capacitor electrodes' [patent_app_type] => new [patent_app_number] => 10/795696 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14494 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20040175586.pdf [firstpage_image] =>[orig_patent_app_number] => 10795696 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/795696
Conformal thin films over textured capacitor electrodes Mar 2, 2004 Abandoned
Array ( [id] => 5867670 [patent_doc_number] => 20060162287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Anisotropic conductive sheet' [patent_app_type] => utility [patent_app_number] => 10/547001 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8616 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20060162287.pdf [firstpage_image] =>[orig_patent_app_number] => 10547001 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/547001
Anisotropic conductive sheet Feb 26, 2004 Abandoned
Array ( [id] => 7176637 [patent_doc_number] => 20050189608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => '[SHALLOW TRENCH ISOLATION AND METHOD OF FORMING THE SAME]' [patent_app_type] => utility [patent_app_number] => 10/708372 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2660 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20050189608.pdf [firstpage_image] =>[orig_patent_app_number] => 10708372 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708372
[SHALLOW TRENCH ISOLATION AND METHOD OF FORMING THE SAME] Feb 25, 2004 Abandoned
Array ( [id] => 7048473 [patent_doc_number] => 20050184360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof' [patent_app_type] => utility [patent_app_number] => 10/787002 [patent_app_country] => US [patent_app_date] => 2004-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 7978 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20050184360.pdf [firstpage_image] =>[orig_patent_app_number] => 10787002 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/787002
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof Feb 24, 2004 Issued
Array ( [id] => 616781 [patent_doc_number] => 07145194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-05 [patent_title] => 'Semiconductor integrated circuit device and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/781861 [patent_app_country] => US [patent_app_date] => 2004-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 87 [patent_figures_cnt] => 100 [patent_no_of_words] => 30081 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/145/07145194.pdf [firstpage_image] =>[orig_patent_app_number] => 10781861 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781861
Semiconductor integrated circuit device and a method of manufacturing the same Feb 19, 2004 Issued
Array ( [id] => 7448631 [patent_doc_number] => 20040164418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Semiconductor device having a pillar structure' [patent_app_type] => new [patent_app_number] => 10/780701 [patent_app_country] => US [patent_app_date] => 2004-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9078 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164418.pdf [firstpage_image] =>[orig_patent_app_number] => 10780701 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/780701
Semiconductor device having a pillar structure Feb 18, 2004 Issued
Array ( [id] => 6994092 [patent_doc_number] => 20050133868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => '[ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT FOR DUAL-POLARITY INPUT/OUTPUT PAD]' [patent_app_type] => utility [patent_app_number] => 10/708171 [patent_app_country] => US [patent_app_date] => 2004-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3223 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20050133868.pdf [firstpage_image] =>[orig_patent_app_number] => 10708171 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708171
Electro-static discharge protection circuit for dual-polarity input/output pad Feb 11, 2004 Issued
Array ( [id] => 7447516 [patent_doc_number] => 20040164297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Display device' [patent_app_type] => new [patent_app_number] => 10/772432 [patent_app_country] => US [patent_app_date] => 2004-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9175 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164297.pdf [firstpage_image] =>[orig_patent_app_number] => 10772432 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/772432
Display device Feb 5, 2004 Abandoned
Array ( [id] => 7363109 [patent_doc_number] => 20040217416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'DMOS device having a trenched bus structure' [patent_app_type] => new [patent_app_number] => 10/774212 [patent_app_country] => US [patent_app_date] => 2004-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217416.pdf [firstpage_image] =>[orig_patent_app_number] => 10774212 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/774212
DMOS device having a trenched bus structure Feb 4, 2004 Issued
Array ( [id] => 7443513 [patent_doc_number] => 20040163843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Multi-chip package with soft element and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/772651 [patent_app_country] => US [patent_app_date] => 2004-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3757 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20040163843.pdf [firstpage_image] =>[orig_patent_app_number] => 10772651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/772651
Multi-chip package with soft element and method of manufacturing the same Feb 3, 2004 Abandoned
Array ( [id] => 7219502 [patent_doc_number] => 20040155274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Capacitor structures with recessed hemispherical grain silicon' [patent_app_type] => new [patent_app_number] => 10/771042 [patent_app_country] => US [patent_app_date] => 2004-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8054 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20040155274.pdf [firstpage_image] =>[orig_patent_app_number] => 10771042 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/771042
Capacitor structures with recessed hemispherical grain silicon Feb 2, 2004 Abandoned
Array ( [id] => 8283347 [patent_doc_number] => 08217450 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-10 [patent_title] => 'Double-gate semiconductor device with gate contacts formed adjacent sidewalls of a fin' [patent_app_type] => utility [patent_app_number] => 10/770011 [patent_app_country] => US [patent_app_date] => 2004-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3541 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10770011 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/770011
Double-gate semiconductor device with gate contacts formed adjacent sidewalls of a fin Feb 2, 2004 Issued
Array ( [id] => 7420558 [patent_doc_number] => 20040183072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Novel conductive elements for thin film transistors used in a flat panel display' [patent_app_type] => new [patent_app_number] => 10/767281 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5127 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183072.pdf [firstpage_image] =>[orig_patent_app_number] => 10767281 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/767281
Novel conductive elements for thin film transistors used in a flat panel display Jan 29, 2004 Abandoned
Array ( [id] => 7002434 [patent_doc_number] => 20050167747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Bipolar junction transistor geometry' [patent_app_type] => utility [patent_app_number] => 10/769571 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5222 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167747.pdf [firstpage_image] =>[orig_patent_app_number] => 10769571 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769571
Bipolar junction transistor geometry Jan 29, 2004 Issued
Array ( [id] => 7002526 [patent_doc_number] => 20050167839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Structure comprising amorphous carbon film and method of forming thereof' [patent_app_type] => utility [patent_app_number] => 10/766872 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8311 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167839.pdf [firstpage_image] =>[orig_patent_app_number] => 10766872 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766872
Structure comprising amorphous carbon film and method of forming thereof Jan 29, 2004 Issued
Array ( [id] => 7002485 [patent_doc_number] => 20050167798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Die-wafer package and method of fabricating same' [patent_app_type] => utility [patent_app_number] => 10/767921 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5453 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167798.pdf [firstpage_image] =>[orig_patent_app_number] => 10767921 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/767921
Die-wafer package and method of fabricating same Jan 28, 2004 Issued
Array ( [id] => 6915604 [patent_doc_number] => 20050093165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/766471 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2794 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20050093165.pdf [firstpage_image] =>[orig_patent_app_number] => 10766471 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766471
Semiconductor device and method of manufacturing the same Jan 28, 2004 Issued
Array ( [id] => 7002483 [patent_doc_number] => 20050167796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Miniaturised surface mount optoelectronic component' [patent_app_type] => utility [patent_app_number] => 10/765841 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1330 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167796.pdf [firstpage_image] =>[orig_patent_app_number] => 10765841 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765841
Miniaturised surface mount optoelectronic component Jan 28, 2004 Abandoned
Array ( [id] => 627353 [patent_doc_number] => 07135738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-14 [patent_title] => 'Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology' [patent_app_type] => utility [patent_app_number] => 10/767751 [patent_app_country] => US [patent_app_date] => 2004-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 217 [patent_figures_cnt] => 276 [patent_no_of_words] => 34827 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/135/07135738.pdf [firstpage_image] =>[orig_patent_app_number] => 10767751 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/767751
Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology Jan 27, 2004 Issued
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