Willis Little
Examiner (ID: 13674)
Most Active Art Unit | 3203 |
Art Unit(s) | 2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103 |
Total Applications | 2327 |
Issued Applications | 2182 |
Pending Applications | 48 |
Abandoned Applications | 97 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6949788
[patent_doc_number] => 20050224882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'LOW TRIGGER VOLTAGE ESD NMOSFET TRIPLE-WELL CMOS DEVICES'
[patent_app_type] => utility
[patent_app_number] => 10/709041
[patent_app_country] => US
[patent_app_date] => 2004-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2769
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224882.pdf
[firstpage_image] =>[orig_patent_app_number] => 10709041
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/709041 | LOW TRIGGER VOLTAGE ESD NMOSFET TRIPLE-WELL CMOS DEVICES | Apr 7, 2004 | Abandoned |
Array
(
[id] => 7403939
[patent_doc_number] => 20040175586
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'Conformal thin films over textured capacitor electrodes'
[patent_app_type] => new
[patent_app_number] => 10/795696
[patent_app_country] => US
[patent_app_date] => 2004-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20040175586.pdf
[firstpage_image] =>[orig_patent_app_number] => 10795696
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/795696 | Conformal thin films over textured capacitor electrodes | Mar 2, 2004 | Abandoned |
Array
(
[id] => 5867670
[patent_doc_number] => 20060162287
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Anisotropic conductive sheet'
[patent_app_type] => utility
[patent_app_number] => 10/547001
[patent_app_country] => US
[patent_app_date] => 2004-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 8616
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[pdf_file] => publications/A1/0162/20060162287.pdf
[firstpage_image] =>[orig_patent_app_number] => 10547001
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/547001 | Anisotropic conductive sheet | Feb 26, 2004 | Abandoned |
Array
(
[id] => 7176637
[patent_doc_number] => 20050189608
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-01
[patent_title] => '[SHALLOW TRENCH ISOLATION AND METHOD OF FORMING THE SAME]'
[patent_app_type] => utility
[patent_app_number] => 10/708372
[patent_app_country] => US
[patent_app_date] => 2004-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 2660
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[pdf_file] => publications/A1/0189/20050189608.pdf
[firstpage_image] =>[orig_patent_app_number] => 10708372
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/708372 | [SHALLOW TRENCH ISOLATION AND METHOD OF FORMING THE SAME] | Feb 25, 2004 | Abandoned |
Array
(
[id] => 7048473
[patent_doc_number] => 20050184360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof'
[patent_app_type] => utility
[patent_app_number] => 10/787002
[patent_app_country] => US
[patent_app_date] => 2004-02-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0184/20050184360.pdf
[firstpage_image] =>[orig_patent_app_number] => 10787002
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/787002 | Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof | Feb 24, 2004 | Issued |
Array
(
[id] => 616781
[patent_doc_number] => 07145194
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-05
[patent_title] => 'Semiconductor integrated circuit device and a method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/781861
[patent_app_country] => US
[patent_app_date] => 2004-02-20
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[pdf_file] => patents/07/145/07145194.pdf
[firstpage_image] =>[orig_patent_app_number] => 10781861
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/781861 | Semiconductor integrated circuit device and a method of manufacturing the same | Feb 19, 2004 | Issued |
Array
(
[id] => 7448631
[patent_doc_number] => 20040164418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-26
[patent_title] => 'Semiconductor device having a pillar structure'
[patent_app_type] => new
[patent_app_number] => 10/780701
[patent_app_country] => US
[patent_app_date] => 2004-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 9078
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20040164418.pdf
[firstpage_image] =>[orig_patent_app_number] => 10780701
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/780701 | Semiconductor device having a pillar structure | Feb 18, 2004 | Issued |
Array
(
[id] => 6994092
[patent_doc_number] => 20050133868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => '[ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT FOR DUAL-POLARITY INPUT/OUTPUT PAD]'
[patent_app_type] => utility
[patent_app_number] => 10/708171
[patent_app_country] => US
[patent_app_date] => 2004-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3223
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[pdf_file] => publications/A1/0133/20050133868.pdf
[firstpage_image] =>[orig_patent_app_number] => 10708171
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/708171 | Electro-static discharge protection circuit for dual-polarity input/output pad | Feb 11, 2004 | Issued |
Array
(
[id] => 7447516
[patent_doc_number] => 20040164297
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-26
[patent_title] => 'Display device'
[patent_app_type] => new
[patent_app_number] => 10/772432
[patent_app_country] => US
[patent_app_date] => 2004-02-06
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[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0164/20040164297.pdf
[firstpage_image] =>[orig_patent_app_number] => 10772432
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/772432 | Display device | Feb 5, 2004 | Abandoned |
Array
(
[id] => 7363109
[patent_doc_number] => 20040217416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-04
[patent_title] => 'DMOS device having a trenched bus structure'
[patent_app_type] => new
[patent_app_number] => 10/774212
[patent_app_country] => US
[patent_app_date] => 2004-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0217/20040217416.pdf
[firstpage_image] =>[orig_patent_app_number] => 10774212
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/774212 | DMOS device having a trenched bus structure | Feb 4, 2004 | Issued |
Array
(
[id] => 7443513
[patent_doc_number] => 20040163843
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-26
[patent_title] => 'Multi-chip package with soft element and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/772651
[patent_app_country] => US
[patent_app_date] => 2004-02-04
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[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 3757
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0163/20040163843.pdf
[firstpage_image] =>[orig_patent_app_number] => 10772651
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/772651 | Multi-chip package with soft element and method of manufacturing the same | Feb 3, 2004 | Abandoned |
Array
(
[id] => 7219502
[patent_doc_number] => 20040155274
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-12
[patent_title] => 'Capacitor structures with recessed hemispherical grain silicon'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/771042 | Capacitor structures with recessed hemispherical grain silicon | Feb 2, 2004 | Abandoned |
Array
(
[id] => 8283347
[patent_doc_number] => 08217450
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-07-10
[patent_title] => 'Double-gate semiconductor device with gate contacts formed adjacent sidewalls of a fin'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/770011 | Double-gate semiconductor device with gate contacts formed adjacent sidewalls of a fin | Feb 2, 2004 | Issued |
Array
(
[id] => 7420558
[patent_doc_number] => 20040183072
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Novel conductive elements for thin film transistors used in a flat panel display'
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 10767281
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/767281 | Novel conductive elements for thin film transistors used in a flat panel display | Jan 29, 2004 | Abandoned |
Array
(
[id] => 7002434
[patent_doc_number] => 20050167747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-04
[patent_title] => 'Bipolar junction transistor geometry'
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[firstpage_image] =>[orig_patent_app_number] => 10769571
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/769571 | Bipolar junction transistor geometry | Jan 29, 2004 | Issued |
Array
(
[id] => 7002526
[patent_doc_number] => 20050167839
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-04
[patent_title] => 'Structure comprising amorphous carbon film and method of forming thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/766872 | Structure comprising amorphous carbon film and method of forming thereof | Jan 29, 2004 | Issued |
Array
(
[id] => 7002485
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/765841 | Miniaturised surface mount optoelectronic component | Jan 28, 2004 | Abandoned |
Array
(
[id] => 627353
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[patent_title] => 'Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology'
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[firstpage_image] =>[orig_patent_app_number] => 10767751
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/767751 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology | Jan 27, 2004 | Issued |