Search

Willis Little

Examiner (ID: 13674)

Most Active Art Unit
3203
Art Unit(s)
2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103
Total Applications
2327
Issued Applications
2182
Pending Applications
48
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6886624 [patent_doc_number] => 20010019893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-06 [patent_title] => 'Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture' [patent_app_type] => new [patent_app_number] => 09/832272 [patent_app_country] => US [patent_app_date] => 2001-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3845 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20010019893.pdf [firstpage_image] =>[orig_patent_app_number] => 09832272 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/832272
Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture Apr 9, 2001 Issued
Array ( [id] => 1169737 [patent_doc_number] => 06756658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Making two lead surface mounting high power microleadframe semiconductor packages' [patent_app_type] => B1 [patent_app_number] => 09/827791 [patent_app_country] => US [patent_app_date] => 2001-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756658.pdf [firstpage_image] =>[orig_patent_app_number] => 09827791 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827791
Making two lead surface mounting high power microleadframe semiconductor packages Apr 5, 2001 Issued
Array ( [id] => 6395949 [patent_doc_number] => 20020036339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 09/822342 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 19480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036339.pdf [firstpage_image] =>[orig_patent_app_number] => 09822342 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/822342
Semiconductor device with multiple supporting points Apr 1, 2001 Issued
Array ( [id] => 734216 [patent_doc_number] => 07038294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Planar spiral inductor structure with patterned microelectronic structure integral thereto' [patent_app_type] => utility [patent_app_number] => 09/821521 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 6294 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038294.pdf [firstpage_image] =>[orig_patent_app_number] => 09821521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/821521
Planar spiral inductor structure with patterned microelectronic structure integral thereto Mar 28, 2001 Issued
Array ( [id] => 6888520 [patent_doc_number] => 20010023975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Method of and apparatus for cutting off fuse electrode, integrated circuit device, and method of manufacturing same' [patent_app_type] => new [patent_app_number] => 09/813992 [patent_app_country] => US [patent_app_date] => 2001-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7208 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023975.pdf [firstpage_image] =>[orig_patent_app_number] => 09813992 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/813992
Apparatus for selectively cutting fuse electrodes Mar 21, 2001 Issued
Array ( [id] => 1380281 [patent_doc_number] => 06563199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-13 [patent_title] => 'Lead frame for semiconductor devices, a semiconductor device made using the lead frame' [patent_app_type] => B2 [patent_app_number] => 09/813262 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3709 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563199.pdf [firstpage_image] =>[orig_patent_app_number] => 09813262 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/813262
Lead frame for semiconductor devices, a semiconductor device made using the lead frame Mar 19, 2001 Issued
Array ( [id] => 1597896 [patent_doc_number] => 06492708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Integrated coil inductors for IC devices' [patent_app_type] => B2 [patent_app_number] => 09/808381 [patent_app_country] => US [patent_app_date] => 2001-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 2788 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492708.pdf [firstpage_image] =>[orig_patent_app_number] => 09808381 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808381
Integrated coil inductors for IC devices Mar 13, 2001 Issued
Array ( [id] => 6888316 [patent_doc_number] => 20010023771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Metal line, method for fabricating the metal line, thin film transistor employing the metal line and display device' [patent_app_type] => new [patent_app_number] => 09/795832 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8680 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023771.pdf [firstpage_image] =>[orig_patent_app_number] => 09795832 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/795832
Metal line, method for fabricating the metal line, thin film transistor employing the metal line and display device Feb 27, 2001 Issued
Array ( [id] => 6891236 [patent_doc_number] => 20010017398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Method and device for limiting the substrate potential in junction isolated integrated circuits' [patent_app_type] => new [patent_app_number] => 09/794261 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2411 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20010017398.pdf [firstpage_image] =>[orig_patent_app_number] => 09794261 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/794261
Method and device for limiting the substrate potential in junction isolated integrated circuits Feb 26, 2001 Issued
Array ( [id] => 6888932 [patent_doc_number] => 20010024387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Conformal thin films over textured capacitor electrodes' [patent_app_type] => new [patent_app_number] => 09/791072 [patent_app_country] => US [patent_app_date] => 2001-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14447 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20010024387.pdf [firstpage_image] =>[orig_patent_app_number] => 09791072 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/791072
Conformal thin films over textured capacitor electrodes Feb 21, 2001 Issued
Array ( [id] => 1424396 [patent_doc_number] => 06515345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-04 [patent_title] => 'Transient voltage suppressor with diode overlaying another diode for conserving space' [patent_app_type] => B2 [patent_app_number] => 09/788710 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6167 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515345.pdf [firstpage_image] =>[orig_patent_app_number] => 09788710 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788710
Transient voltage suppressor with diode overlaying another diode for conserving space Feb 20, 2001 Issued
Array ( [id] => 5918087 [patent_doc_number] => 20020113307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'High-density flip-chip interconnect' [patent_app_type] => new [patent_app_number] => 09/789401 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3109 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20020113307.pdf [firstpage_image] =>[orig_patent_app_number] => 09789401 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789401
High-density flip-chip interconnect Feb 19, 2001 Issued
Array ( [id] => 1420988 [patent_doc_number] => 06521973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-18 [patent_title] => 'Semiconductor device with integrated power transistor and suppression diode' [patent_app_type] => B2 [patent_app_number] => 09/782662 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521973.pdf [firstpage_image] =>[orig_patent_app_number] => 09782662 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782662
Semiconductor device with integrated power transistor and suppression diode Feb 12, 2001 Issued
Array ( [id] => 6907610 [patent_doc_number] => 20010010377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricting same' [patent_app_type] => new [patent_app_number] => 09/779391 [patent_app_country] => US [patent_app_date] => 2001-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20010010377.pdf [firstpage_image] =>[orig_patent_app_number] => 09779391 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/779391
Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same Feb 6, 2001 Issued
Array ( [id] => 1229995 [patent_doc_number] => 06696751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-24 [patent_title] => 'Semiconductor device and portable device having a mounting region sharing point symmetry' [patent_app_type] => B2 [patent_app_number] => 09/776631 [patent_app_country] => US [patent_app_date] => 2001-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 3298 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/696/06696751.pdf [firstpage_image] =>[orig_patent_app_number] => 09776631 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776631
Semiconductor device and portable device having a mounting region sharing point symmetry Feb 5, 2001 Issued
Array ( [id] => 6012389 [patent_doc_number] => 20020100976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'BOC semiconductor package including a semiconductor die and a substrate bonded circuit side down to the die' [patent_app_type] => new [patent_app_number] => 09/774130 [patent_app_country] => US [patent_app_date] => 2001-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4992 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20020100976.pdf [firstpage_image] =>[orig_patent_app_number] => 09774130 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774130
BOC semiconductor package including a semiconductor die and a substrate bonded circuit side down to the die Jan 29, 2001 Issued
Array ( [id] => 7632768 [patent_doc_number] => 06664566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Photoelectric conversion device and method of making the same' [patent_app_type] => B1 [patent_app_number] => 09/771624 [patent_app_country] => US [patent_app_date] => 2001-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5128 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664566.pdf [firstpage_image] =>[orig_patent_app_number] => 09771624 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/771624
Photoelectric conversion device and method of making the same Jan 29, 2001 Issued
Array ( [id] => 1417229 [patent_doc_number] => 06528870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-04 [patent_title] => 'Semiconductor device having a plurality of stacked wiring boards' [patent_app_type] => B2 [patent_app_number] => 09/769394 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 54 [patent_no_of_words] => 9730 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528870.pdf [firstpage_image] =>[orig_patent_app_number] => 09769394 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/769394
Semiconductor device having a plurality of stacked wiring boards Jan 25, 2001 Issued
Array ( [id] => 5982039 [patent_doc_number] => 20020096754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Stacked structure of integrated circuits' [patent_app_type] => new [patent_app_number] => 09/770053 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2024 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20020096754.pdf [firstpage_image] =>[orig_patent_app_number] => 09770053 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/770053
Stacked structure of integrated circuits Jan 23, 2001 Abandoned
Array ( [id] => 1300251 [patent_doc_number] => 06627983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Stacked package structure of image sensor' [patent_app_type] => B2 [patent_app_number] => 09/770083 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1899 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627983.pdf [firstpage_image] =>[orig_patent_app_number] => 09770083 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/770083
Stacked package structure of image sensor Jan 23, 2001 Issued
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