Search

Willis Little

Examiner (ID: 13674)

Most Active Art Unit
3203
Art Unit(s)
2899, 3643, 2107, 2403, 2406, 3203, 3616, 2401, 2103
Total Applications
2327
Issued Applications
2182
Pending Applications
48
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1428126 [patent_doc_number] => 06504212 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Method and apparatus for enhanced SOI passgate operations' [patent_app_type] => B1 [patent_app_number] => 09/497361 [patent_app_country] => US [patent_app_date] => 2000-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 2614 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504212.pdf [firstpage_image] =>[orig_patent_app_number] => 09497361 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/497361
Method and apparatus for enhanced SOI passgate operations Feb 2, 2000 Issued
Array ( [id] => 1497196 [patent_doc_number] => 06404060 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Semiconductor device having a chip-on-chip structure' [patent_app_type] => B1 [patent_app_number] => 09/496191 [patent_app_country] => US [patent_app_date] => 2000-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3143 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404060.pdf [firstpage_image] =>[orig_patent_app_number] => 09496191 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/496191
Semiconductor device having a chip-on-chip structure Feb 1, 2000 Issued
09/487083 Silicon On Insulator Circuit Structure With Buried Semiconductor Interconnect Structure And Method For Forming Same Jan 18, 2000 Abandoned
Array ( [id] => 6415512 [patent_doc_number] => 20020125568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Method Of Fabricating Chip-Scale Packages And Resulting Structures' [patent_app_type] => new [patent_app_number] => 09/483712 [patent_app_country] => US [patent_app_date] => 2000-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3359 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125568.pdf [firstpage_image] =>[orig_patent_app_number] => 09483712 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/483712
Method Of Fabricating Chip-Scale Packages And Resulting Structures Jan 13, 2000 Abandoned
09/482101 ORGANIC FLIP CHIP PACKAGES WITH AN ARRAY OF THROUGH HOLE PINS Jan 12, 2000 Abandoned
Array ( [id] => 1159621 [patent_doc_number] => 06762474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'Method and apparatus for temperature compensation of read-only memory' [patent_app_type] => B1 [patent_app_number] => 09/479708 [patent_app_country] => US [patent_app_date] => 2000-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2844 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762474.pdf [firstpage_image] =>[orig_patent_app_number] => 09479708 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/479708
Method and apparatus for temperature compensation of read-only memory Jan 6, 2000 Issued
Array ( [id] => 1524929 [patent_doc_number] => 06353267 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Semiconductor device having first and second sealing resins' [patent_app_type] => B1 [patent_app_number] => 09/478211 [patent_app_country] => US [patent_app_date] => 2000-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2503 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353267.pdf [firstpage_image] =>[orig_patent_app_number] => 09478211 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/478211
Semiconductor device having first and second sealing resins Jan 4, 2000 Issued
Array ( [id] => 756277 [patent_doc_number] => 07019363 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-28 [patent_title] => 'MOS transistor with asymmetrical source/drain extensions' [patent_app_type] => utility [patent_app_number] => 09/476961 [patent_app_country] => US [patent_app_date] => 2000-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2995 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/019/07019363.pdf [firstpage_image] =>[orig_patent_app_number] => 09476961 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/476961
MOS transistor with asymmetrical source/drain extensions Jan 2, 2000 Issued
Array ( [id] => 1120956 [patent_doc_number] => 06798076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Method and apparatus for encoding information in an IC package' [patent_app_type] => B2 [patent_app_number] => 09/470092 [patent_app_country] => US [patent_app_date] => 1999-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2179 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798076.pdf [firstpage_image] =>[orig_patent_app_number] => 09470092 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/470092
Method and apparatus for encoding information in an IC package Dec 20, 1999 Issued
09/454003 DEFINE VIA IN DUAL DAMASCENE PROCESS Dec 2, 1999 Abandoned
Array ( [id] => 4331447 [patent_doc_number] => 06329678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Semiconductor memory array' [patent_app_type] => 1 [patent_app_number] => 9/451852 [patent_app_country] => US [patent_app_date] => 1999-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 3654 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329678.pdf [firstpage_image] =>[orig_patent_app_number] => 451852 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/451852
Semiconductor memory array Nov 30, 1999 Issued
Array ( [id] => 1552814 [patent_doc_number] => 06399974 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Semiconductor memory device using an insulator film for the capacitor of the memory cell and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/441823 [patent_app_country] => US [patent_app_date] => 1999-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 8379 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/399/06399974.pdf [firstpage_image] =>[orig_patent_app_number] => 09441823 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/441823
Semiconductor memory device using an insulator film for the capacitor of the memory cell and method for manufacturing the same Nov 16, 1999 Issued
Array ( [id] => 1410776 [patent_doc_number] => 06534861 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Ball grid substrate for lead-on-chip semiconductor package' [patent_app_type] => B1 [patent_app_number] => 09/440630 [patent_app_country] => US [patent_app_date] => 1999-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4786 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534861.pdf [firstpage_image] =>[orig_patent_app_number] => 09440630 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/440630
Ball grid substrate for lead-on-chip semiconductor package Nov 14, 1999 Issued
Array ( [id] => 4333740 [patent_doc_number] => 06320243 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Defect removable semiconductor devices and manufacturing methods thereof' [patent_app_type] => 1 [patent_app_number] => 9/434623 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3474 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320243.pdf [firstpage_image] =>[orig_patent_app_number] => 434623 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/434623
Defect removable semiconductor devices and manufacturing methods thereof Nov 4, 1999 Issued
Array ( [id] => 1246715 [patent_doc_number] => 06677676 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Semiconductor device having steady substrate potential' [patent_app_type] => B1 [patent_app_number] => 09/433382 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 35 [patent_no_of_words] => 13507 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/677/06677676.pdf [firstpage_image] =>[orig_patent_app_number] => 09433382 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433382
Semiconductor device having steady substrate potential Nov 2, 1999 Issued
09/433591 METHOD AND SYSTEM FOR REDUCING ARC LAYER REMOVAL DURING REMOVAL OF PHOTORESIST Nov 1, 1999 Abandoned
Array ( [id] => 1015021 [patent_doc_number] => 06894365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Semiconductor device having an integral resistance element' [patent_app_type] => utility [patent_app_number] => 09/431593 [patent_app_country] => US [patent_app_date] => 1999-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 3818 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894365.pdf [firstpage_image] =>[orig_patent_app_number] => 09431593 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/431593
Semiconductor device having an integral resistance element Oct 31, 1999 Issued
Array ( [id] => 4372898 [patent_doc_number] => 06274887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => 1 [patent_app_number] => 9/431131 [patent_app_country] => US [patent_app_date] => 1999-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 80 [patent_no_of_words] => 22216 [patent_no_of_claims] => 81 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274887.pdf [firstpage_image] =>[orig_patent_app_number] => 431131 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/431131
Semiconductor device and manufacturing method therefor Oct 31, 1999 Issued
Array ( [id] => 4388508 [patent_doc_number] => 06278189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'High density integrated circuits using tapered and self-aligned contacts' [patent_app_type] => 1 [patent_app_number] => 9/428571 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3707 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278189.pdf [firstpage_image] =>[orig_patent_app_number] => 428571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/428571
High density integrated circuits using tapered and self-aligned contacts Oct 27, 1999 Issued
Array ( [id] => 7963801 [patent_doc_number] => 06680527 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Monolithic semiconducting ceramic electronic component' [patent_app_type] => B1 [patent_app_number] => 09/426652 [patent_app_country] => US [patent_app_date] => 1999-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2941 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680527.pdf [firstpage_image] =>[orig_patent_app_number] => 09426652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426652
Monolithic semiconducting ceramic electronic component Oct 24, 1999 Issued
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